NCP5378 datasheet(8/18 Pages) ONSEMI

Part #	NCP5378

Description	Single Phase Synchronous Buck Controller with Integrated Gate Drivers and Programmable DAC

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NCP5378

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ELECTRICAL CHARACTERISTICS

0°C < TA < 70°C; 0°C < TJ < 125°C; 4.75 < VCC < 5.25 V; All DAC Codes; CVCC = 0.1 mF unless otherwise noted.

Parameter

Unit

Max

Typ

Min

Test Conditions

DAC OUTPUT

Output Source Current

Vout = 1.6 V

0

−

5.0

mA

Output Sink Current

Vout = 0.3 V

5.0

−

16

mA

VID INPUTS

Threshold

450

600

770

mV

VR11 Mode Leakage

−100

−

100

nA

Delay before Latching VID Change

(VID Deskewing) (Note 3)

Measured from the edge of the 1st VID

change

200

−

300

ns

DIGITAL DAC SLEW RATE LIMITER

Slew Rate Limit

12.5

−

16

mV/ms

Soft−Start Slew Rate

−

0.84

−

mV/ms

INPUT SUPPLY CURRENT

VCC Quiescent Current

EN Low, No PWM

10

−

30

mA

VCCP SUPPLY VOLTAGE

VCCP UVLO Start Threshold

8.2

9.0

9.5

V

VCCP UVLO Stop Threshold

7.2

8.0

8.5

V

VCCP UVLO Hysteresis

1.0

−

V

VCCP POR

Voltage at which the Driver OVP

becomes active

3.0

3.2

−

BOOST PIN UVLO

BOOST UVLO Start Threshold (Note 3)

3.15

4.15

V

BOOST UVLO Stop Threshold (Note 3)

3.0

3.85

V

BOOST UVLO Hysteresis (Note 3)

50

200

−

mV

STARTUP HIGH SIDE SHORT TRIP (Active only during 1st power on)

Vswx Output Overvoltage Trip Threshold at

Startup

Power Startup time, VCC > 9 V

1.7

−

2.03

V

HIGH SIDE DRIVER

RH_TG Output Resistance, Sourcing

VBST − VSW = 12 V

−

1.8

−

W

RH_TG Output Resistance, Sinking

VBST − VSW = 12 V

−

1.0

−

TrDRVH Transition Time

CLOAD = 3 nF, VBST − VSW = 12 V

−

25

−

ns

TfDRVH Transition Time

CLOAD = 3 nF, VBST − VSW = 12 V

−

20

−

ns

TpdhDRVH Propagation Delay (Note 4)

Driving High, CLOAD = 3.3 nF,

VCCP = 12 V

−

15

−

ns

LOW SIDE DRIVER

RH_BG Output Resistance, Sourcing

SW = GND

−

1.6

−

W

RL_BG Output Resistance, Sinking

SW = VCC

−

1.0

−

W

TrDRVL Transition Time

CLOAD = 3 nF

−

20

−

ns

TfDRVL Transition Time

CLOAD = 3 nF

−

20

−

ns

TpdhDRVL Propagation Delay (Note 4)

Driving High, CLOAD = 3.3 nF,

VCCP = 12 V

−

20

−

ns

VNCDT Negative Current Detector Threshold

(Note 3)

−

−4.0

−

mV

3. Guaranteed by design.

4. For propagation delays, “tpdh” refers to the specified signal going high “tpdl” refers to it going low. Reference Gate Timing Diagram.

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