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SN65LVDS3486D Datasheet(PDF) 1 Page - Texas Instruments

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Part # SN65LVDS3486D
Description  HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
Download  35 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN65LVDS3486D Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION
19
20
1
3
2
17
18
16
15
14
13
12
11
9
10
5
4
6
7
8
4A
4Y
NC
G
3Y
1Y
G
NC
2Y
2A
SN55LVDS32FK
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
VCC
4B
4A
4Y
G
3Y
3A
3B
SN55LVDS32 . . . J OR W
SN65LVDS32 . . . D OR PW
(Marked as LVDS32 or 65LVDS32)
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
1,2EN
2Y
2A
2B
GND
VCC
4B
4A
4Y
3,4EN
3Y
3A
3B
SN65LVDS3486D (Marked as LVDS3486)
(TOP VIEW)
1
2
3
4
8
7
6
5
VCC
1Y
2Y
GND
1A
1B
2A
2B
SN65LVDS9637D (Marked as DK637 or LVDS37)
SN65LVDS9637DGN (Marked as L37)
SN65LVDS9637DGK (Marked as AXF)
(TOP VIEW)
SN55LVDS32, SN65LVDS32
SN65LVDS3486, SN65LVDS9637
SLLS262Q – JULY 1997 – REVISED JULY 2007
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
• Meet or Exceed the Requirements of ANSI
TIA/EIA-644 Standard
• Operate With a Single 3.3-V Supply
• Designed for Signaling Rates of up to 100
Mbps (See Table 1)
• Differential Input Thresholds ±100 mV Max
• Typical Propagation Delay Time of 2.1 ns
• Power Dissipation 60 mW Typical Per
Receiver at Maximum Data Rate
• Bus-Terminal ESD Protection Exceeds 8 kV
• Low-Voltage TTL (LVTTL) Logic Output Levels
• Pin Compatible With AM26LS32, MC3486, and
μA9637
• Open-Circuit Fail-Safe
• Cold Sparing for Space and High Reliability
Applications Requiring Redundancy
The SN55LVDS32, SN65LVDS32, SN65LVDS3486,
and SN65LVDS9637 are differential line receivers
that
implement
the
electrical
characteristics
of
low-voltage
differential
signaling
(LVDS).
This
signaling technique lowers the output voltage levels
of
5-V
differential
standard
levels
(such
as
EIA/TIA-422B) to reduce the power, increase the
switching speeds, and allow operation with a 3.3-V
supply rail. Any of the four differential receivers
provides a valid logical output state with a
±100-mV
differential
input
voltage
within
the
input
common-mode
voltage
range.
The
input
common-mode voltage range allows 1 V of ground
potential difference between two LVDS nodes.
The intended application of these devices and
signaling
technique
is
both
point-to-point
and
multidrop (one driver and multiple receivers) data
transmission over controlled impedance media of
approximately 100
Ω. The transmission media may
be
printed-circuit
board
traces,
backplanes,
or
cables. The ultimate rate and distance ofdata
transfer depends on the attenuation characteristics of
the media and the noise coupling to the environment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1997–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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