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LM3S8530-EQR50-C1T Datasheet(PDF) 5 Page - Texas Instruments |
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LM3S8530-EQR50-C1T Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 526 page  10.4 Register Map .............................................................................................................. 228 10.5 Register Descriptions .................................................................................................. 229 11 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 250 11.1 Block Diagram ............................................................................................................ 251 11.2 Functional Description ................................................................................................. 251 11.2.1 Transmit/Receive Logic ............................................................................................... 251 11.2.2 Baud-Rate Generation ................................................................................................. 252 11.2.3 Data Transmission ...................................................................................................... 253 11.2.4 Serial IR (SIR) ............................................................................................................. 253 11.2.5 FIFO Operation ........................................................................................................... 254 11.2.6 Interrupts .................................................................................................................... 254 11.2.7 Loopback Operation .................................................................................................... 255 11.2.8 IrDA SIR block ............................................................................................................ 255 11.3 Initialization and Configuration ..................................................................................... 255 11.4 Register Map .............................................................................................................. 256 11.5 Register Descriptions .................................................................................................. 257 12 Synchronous Serial Interface (SSI) .................................................................... 291 12.1 Block Diagram ............................................................................................................ 291 12.2 Functional Description ................................................................................................. 292 12.2.1 Bit Rate Generation ..................................................................................................... 292 12.2.2 FIFO Operation ........................................................................................................... 292 12.2.3 Interrupts .................................................................................................................... 292 12.2.4 Frame Formats ........................................................................................................... 293 12.3 Initialization and Configuration ..................................................................................... 300 12.4 Register Map .............................................................................................................. 301 12.5 Register Descriptions .................................................................................................. 302 13 Inter-Integrated Circuit (I2C) Interface ................................................................ 328 13.1 Block Diagram ............................................................................................................ 329 13.2 Functional Description ................................................................................................. 329 13.2.1 I2C Bus Functional Overview ........................................................................................ 329 13.2.2 Available Speed Modes ............................................................................................... 331 13.2.3 Interrupts .................................................................................................................... 332 13.2.4 Loopback Operation .................................................................................................... 333 13.2.5 Command Sequence Flow Charts ................................................................................ 333 13.3 Initialization and Configuration ..................................................................................... 340 13.4 Register Map .............................................................................................................. 341 13.5 Register Descriptions (I2C Master) ............................................................................... 342 13.6 Register Descriptions (I2C Slave) ................................................................................. 355 14 Controller Area Network (CAN) Module ............................................................. 364 14.1 Block Diagram ............................................................................................................ 365 14.2 Functional Description ................................................................................................. 365 14.2.1 Initialization ................................................................................................................. 366 14.2.2 Operation ................................................................................................................... 367 14.2.3 Transmitting Message Objects ..................................................................................... 368 14.2.4 Configuring a Transmit Message Object ........................................................................ 368 14.2.5 Updating a Transmit Message Object ........................................................................... 369 14.2.6 Accepting Received Message Objects .......................................................................... 370 5 June 22, 2010 Texas Instruments-Production Data Stellaris® LM3S8530 Microcontroller |
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