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SN74LV4046ADG4 Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LV4046ADG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 15 page www.ti.com Absolute Maximum Ratings (1) Recommended Operating Conditions SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 PCPOUT Phase comparator pulse output 2 PC1OUT Phase comparator 1 output 3 COMPIN Comparator input 4 VCOOUT VCO output 5 INH Inhibit input 6 C1A Capacitor C1 connection A 7 C1B Capacitor C1 connection B 8 GND Ground (0 V) 9 VCOIN VCO input 10 DEMOUT Demodulator output 11 R1 Resistor R1 connection 12 R2 Resistor R2 connection 13 PC2OUT Phase comparator 2 output 14 SIGIN Signal input 15 PC3OUT Phase comparator 3 output 16 VCC Positive supply voltage over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC DC supply voltage range –0.5 7 V VI Input voltage range –0.5 VCC + 0.5 V VO Output voltage range –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output curent VO = 0 to VCC ±35 mA ICC DC VCC or ground current ±70 mA D package 73 DGV package 120 θ JA Package thermal impedance(2) °C/W NS package 64 PW package 108 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The package thermal impedance is calculated in accordance with JESD 51-7. PARAMETER MIN MAX UNIT TA Operating free-air temperature –40 125 °C VCC Supply voltage 3 5.5 V VI, VO DC input or output voltage 0 VCC V 2 Submit Documentation Feedback |
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