TMX320C6748ZWT3 datasheet(1/254 Pages) TI

Part #	TMX320C6748ZWT3

Description	Fixed/Floating-Point DSP

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Manufacturer	TI [Texas Instruments]

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TMS320C6748 Fixed/Floating-Point DSP

1.1 Features

TMS320C6748 Fixed/Floating-Point DSP

www.ti.com

SPRS590A – JUNE 2009 – REVISED AUGUST 2009

• Fixed Point Multiply Supports Two 32 x

• 300-MHz C674x VLIW DSP

32-Bit Multiplies, Four 16 x 16-Bit

• C674x Instruction Set Features

Multiplies, or Eight 8 x 8-Bit Multiplies

–

Superset of the C67x+™ and C64x+™ ISAs

per Clock Cycle, and Complex Multiples

–

2400/1800 C674x MIPS/MFLOPS

–

Instruction Packing Reduces Code Size

–

Byte-Addressable (8-/16-/32-/64-Bit Data)

–

All Instructions Conditional

–

8-Bit Overflow Protection

–

Hardware Support for Modulo Loop

–

Bit-Field Extract, Set, Clear

Operation

–

Normalization, Saturation, Bit-Counting

–

Protected Mode Operation

–

Compact 16-Bit Instructions

–

Exceptions Support for Error Detection and

Program Redirection

• C674x Two Level Cache Memory Architecture

• Software Support

–

32K-Byte L1P Program RAM/Cache

–

TI DSP/BIOS™

–

32K-Byte L1D Data RAM/Cache

–

Chip Support Library and DSP Library

–

256K-Byte L2 Unified Mapped RAM/Cache

–

Flexible RAM/Cache Partition (L1 and L2)

• 128K-Byte RAM Shared Memory

–

1024K-Byte Boot ROM

• 1.8V or 3.3V LVCMOS IOs (except for USB and

• Enhanced Direct-Memory-Access Controller 3

DDR2 interfaces)

(EDMA3):

• Two External Memory Interfaces:

–

2 Channel Controllers

–

EMIFA

–

3 Transfer Controllers

• NOR (8-/16-Bit-Wide Data)

–

64 Independent DMA Channels

• NAND (8-/16-Bit-Wide Data)

–

16 Quick DMA Channels

• 16-Bit SDRAM With 128 MB Address

–

Programmable Transfer Burst Size

Space

–

DDR2/Mobile DDR Memory Controller

• TMS320C674x Floating-Point VLIW DSP Core

• 16-Bit DDR2 SDRAM With 512 MB

–

Load-Store Architecture With Non-Aligned

Address Space or

Support

• 16-Bit mDDR SDRAM With 256 MB

–

64 General-Purpose Registers (32 Bit)

Address Space

–

Six ALU (32-/40-Bit) Functional Units

• Three Configurable 16550 type UART Modules:

• Supports 32-Bit Integer, SP (IEEE Single

Precision/32-Bit) and DP (IEEE Double

–

With Modem Control Signals

Precision/64-Bit) Floating Point

–

16-byte FIFO

• Supports up to Four SP Additions Per

–

16x or 13x Oversampling Option

Clock, Four DP Additions Every 2

• LCD Controller

Clocks

• Two Serial Peripheral Interfaces (SPI) Each

• Supports up to Two Floating Point (SP

With Multiple Chip-Selects

or DP) Reciprocal Approximation

(RCPxP) and Square-Root Reciprocal

• Two Multimedia Card (MMC)/Secure Digital

Approximation (RSQRxP) Operations

(SD) Card Interface with Secure Data I/O

Per Cycle

(SDIO) Interfaces

–

Two Multiply Functional Units

• Two Master/Slave Inter-Integrated Circuit (I2C

• Mixed-Precision IEEE Floating Point

Bus™)

Multiply Supported up to:

• One Host-Port Interface (HPI) With 16-Bit-Wide

–

2 SP x SP -> SP Per Clock

Muxed Address/Data Bus For High Bandwidth

–

2 SP x SP -> DP Every Two Clocks

• Programmable Real-Time Unit Subsystem

–

2 SP x DP -> DP Every Three Clocks

(PRUSS)

–

2 DP x DP -> DP Every Four Clocks

–

Two Independent Programmable Realtime

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this document.

TMS320C6000, C6000 are trademarks of Texas Instruments.

PRODUCT PREVIEW information concerns products in the

formative or design phase of development. Characteristic data and

other specifications are design goals. Texas Instruments reserves

the right to change or discontinue these products without notice.

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