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SN65LVDS3487 Datasheet(PDF) 2 Page - Texas Instruments |
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SN65LVDS3487 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 22 page DESCRIPTION CONTINUED INPUT OUTPUTS D H L Open Y Z H L L L H H DRIVER INPUTS OUTPUT R H ? L VID = VA − VB VID ≥ 100 mV −100 mV < VID < 100 mV VID ≤ −100 mV Open H H = high level, L = low level , ? = indeterminate RECEIVER FUNCTION TABLES DRIVER EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS 300 k Ω 50 Ω VCC 7 V D Input 5 Ω 10 k Ω 7 V Y or Z Output VCC SN65LVDS1 SN65LVDS2 SN65LVDT2 SLLS373K – JULY 1999 – REVISED NOVEMBER 2008.................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. When the SN65LVDS1 is used with an LVDS receiver (such as the SN65LVDT2) in a point-to-point connection, data or clocking signals can be transmitted over printed-circuit-board traces or cables at very high rates with very low electromagnetic emissions and power consumption. The packaging, low power, low EMI, high ESD tolerance, and wide supply voltage range make the device ideal for battery-powered applications. The SN65LVDS1, SN65LVDS2, and SN65LVDT2 are characterized for operation from –40°C to 85°C. 2 Submit Documentation Feedback Copyright © 1999–2008, Texas Instruments Incorporated Product Folder Link(s): SN65LVDS1 SN65LVDS2 SN65LVDT2 |
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