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PCS3P25814 Datasheet(PDF) 2 Page - ON Semiconductor |
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PCS3P25814 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 9 page PCS3P25811 and PCS3P25812 and PCS3P25814 Rev. 1 | Page 2 of 9 | www.onsemi.com Block Diagram Pin Configuration Pin Description Pin# Pin Name Type Description 1 XIN / CLKIN I Crystal connection or External Clock input. 2 VSS P Ground to entire chip. 3 S1 I Digital 3 level logic input (1-M-0) used to select Center, Down and No spread options. (Refer to Frequency Deviation Selection Table). Default=M. 4 S0 I Digital 3 level logic input (1-M-0) used to select Center, Down and No spread options. (Refer to Frequency Deviation Selection Table). Default=M. 5 ModOUT O Spread Spectrum Clock Output. 6 FSEL I Frequency range select. Digital 3 level logic input (1-M-0) used to select Input Clock frequency range (Refer to Input/Output Frequency Range Selection Table). Default=M. 7 VDD P Power supply for the entire chip (2.8V to 3.6V). 8 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. ModOUT 1 2 3 4 5 6 7 8 FSEL XOUT XIN / CLKIN VSS S1 S0 VDD PCS3P25811 PCS3P25812 PCS3P25814 XIN / CLKIN VSS Crystal Oscillator Frequency Divider Feedback Divide r Input Decoder & Modulation control Phase Detector Loop Filter VCO Output Divider ModOUT PLL XOUT VDD FSEL S1 S0 |
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