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IP4359CX4-H500 Datasheet(PDF) 2 Page - NXP Semiconductors |
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IP4359CX4-H500 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 12 page IP4359CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 6 August 2010 2 of 12 NXP Semiconductors IP4359CX4 Dual channel low capacitance ESD protection 2. Pinning information 3. Ordering information [1] For details see Table 5. [2] For details see Table 6. Table 1. Pinning Pin Description Simplified outline Graphic symbol A1 and A2 ESD protection B1 and B2 ground 008aaa236 transparent top view, solder balls facing down B A 2 1 bump A1 index area 008aaa239 A1 A2 B1 B2 Table 2. Ordering information Type number Package height Package Name Description Version IP4359CX4/LF standard[1] WLCSP4 wafer level chip-size package; 4 bumps (2 × 2) IP4359CX4 IP4359CX4/LF-H500 reduced[2] WLCSP4 wafer level chip-size package; 4 bumps (2 × 2) IP4359CX4 |
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