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TJA1054TS900 Datasheet(PDF) 4 Page - NXP Semiconductors |
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TJA1054TS900 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 25 page TJA1054 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 4 — 3 August 2010 4 of 25 NXP Semiconductors TJA1054 Fault-tolerant CAN transceiver 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 2. Pin configuration TJA1054T INH BAT TXD GND RXD CANL ERR CANH STB VCC EN RTL WAKE RTH 001aaf610 1 2 3 4 5 6 7 8 10 9 12 11 14 13 Table 3. Pin description Symbol Pin Description INH 1 inhibit output for switching an external voltage regulator if a wake-up signal occurs TXD 2 transmit data input for activating the driver to the bus lines RXD 3 receive data output for reading out the data from the bus lines ERR 4 error, wake-up and power-on indication output; active LOW in normal operating mode when a bus failure is detected; active LOW in standby and sleep mode when a wake-up is detected; active LOW in power-on standby when a VBAT power-on event is detected STB 5 standby digital control signal input; together with the input signal on pin EN this input determines the state of the transceiver; see Table 5 and Figure 3 EN 6 enable digital control signal input; together with the input signal on pin STB this input determines the state of the transceiver; see Table 5 and Figure 3 WAKE 7 local wake-up signal input (active LOW); both falling and rising edges are detected RTH 8 termination resistor connection; in case of a CANH bus wire error the line is terminated with a predefined impedance RTL 9 termination resistor connection; in case of a CANL bus wire error the line is terminated with a predefined impedance VCC 10 supply voltage CANH 11 HIGH-level CAN bus line CANL 12 LOW-level CAN bus line GND 13 ground BAT 14 battery supply voltage |
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