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FS403LF Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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FS403LF Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
4 / 104 page FS401, FS403 PRODUCT SPECIFICATION REV. NO. 1.7 4 JANUARY 24, 2007 COPYRIGHT © 1999, 2000, 2003 FOCUS ENHANCEMENTS, INC. 5.3.5 Digital-to-Analog Converters ............ 85 5.3.6 On-Screen Display (FS403 only) ..... 85 5.4 Serial Control Port (R-Bus)................... 85 5.4.1 Data Transfer via Serial Interface .... 88 5.4.2 Serial Interface Read/Write Examples....................................................... 88 5.4.2.1 Write to one control register .... 88 5.4.2.2 Write to two consecutive control registers......................................... 89 5.4.2.3 Read from one control register 89 5.4.2.4 Read from two consecutive data registers ............................................ 89 5.5 Embedded Microprocessor................... 89 6. Specifications ................................................ 90 6.1 Absolute Maximum Ratings .................. 90 6.2 Operating Conditions ............................ 91 6.3 Electrical Characteristics ...................... 92 6.4 Switching Characteristics ..................... 93 6.5 System Performance Characteristics ... 94 7. Application Notes .......................................... 95 7.1 Circuit Example - PC ............................ 95 7.2 FS400 Design and Layout Considerations................................................... 96 7.2.1 Video Input to A-D Converters ......... 96 7.2.2 Input ADC Phase Lock Loop ............ 96 7.2.3 Memory Clock Phase Lock Loop ..... 96 7.2.4 External SDRAM Interface ............... 96 7.2.5 HSYNC and VSYNC ........................ 96 7.2.6 Video Output Filters.......................... 97 7.2.7 Analog Power Supply Bypassing, Filtering, and Isolation ................................... 97 7.2.8 Power and Ground ........................... 97 7.3 Interfacing to the FS400 in a Mixed Voltage Environment ......................................... 98 7.3.1 5 to 3.3 Volt Translation ................... 98 7.3.2 SIO Bus Interfacing .......................... 98 8. Mechanical Dimensions .............................. 101 8.1 100-Lead PQFP (KH) Package - FS401LF .......................................................... 101 8.2 128-Lead PQFP Package, FS403 LF. 102 9. Revision History .......................................... 103 10. Ordering Information ............................... 104 10.1 Package Markings: ............................. 104 Tables Table 1. Pin Designations (FS401, 100-pin package)........................................................ 10 Table 2. Pin Designations (FS403, 128-pin package)........................................................ 11 Table 3. Control Register Map .............................. 25 Table 4. Clock Connections ................................... 83 Table 5. Serial Port Addresses .............................. 88 Figures Figure 1: External Scan Converter Block Diagram............................................................7 Figure 2: Embedded Television Design Block Diagram............................................................8 Figure 3: Deleted .....................................................8 Figure 4: Professional & Pro-Consumer Video Design Block Diagram .....................................9 Figure 5. Functional Block Diagram ......................75 Figure 6. FAZE Sets ADCK Sampling Edge on Incoming Pixels ..............................................77 Figure 7: BiPGEN Image .......................................77 Figure 8: Two Dimensional Flicker Filter Response (FLK=0,4,8,12,16,20; SHP=0) ......79 Figure 9: FLK = 16, SHP = 8; Response at Horizontal, 14, 27, 45 Degrees ......................79 Figure 10: FLK = 16, SHP = 16; Response at Horizontal, 14, 27, 45 Degrees ......................80 Figure 11. Timing Parameter Definition, SDRAM Interface .........................................................81 Figure 12. Input Offset and Size Definitions ..........82 Figure 13. Output Horizontal and Vertical Offset Definitions ......................................................82 Figure 14. Zoomed image showing offsets............83 Figure 15. RREF and VTIN Setup..............................85 Figure 16. Serial Port Read/Write Timing..............86 Figure 17. Serial Interface – Typical Byte Transfer ..........................................................86 Figure 18. 7-bit Slave Address with Read/Write\ Bit ...................................................................87 Figure 19. 10-bit address transfer, upper two bits..................................................................87 Figure 20. 10-bit address transfer, lower eight bits..................................................................87 Figure 21. Video Filter Response ..........................95 Figure 22. Video Filter Delay .................................95 Figure 23. 5 to 3.3 Volt Translation using a Resistor ..........................................................98 Figure 24. 5 to 3.3 Volt Translation using a MOSFET Q1 = BSS138, D1 = 1N4148..........98 Figure 25. SIO Translation Using Long-tail Resistors D1 = 1N4148..................................99 Figure 26. SIO Translation Using Current Mirrors D1 = 1N4148, Q1 = 2N3906, Q2 = 2N3904...........................................................99 Figure 27. SIO (Open Collector) Translation using a MOSFET Q1 = BSS138 ..................100 |
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