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MC68HC908GZ8MFJ Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc

Part # MC68HC908GZ8MFJ
Description  M68HC08 Microcontrollers
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68HC908GZ8MFJ Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc

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Table of Contents
Data Sheet
MC68HC908GZ8
10
Table of Contents
Freescale Semiconductor
5.5
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.6
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.6.1
Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.6.2
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.7
I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.7.1
ADC Analog Power Pin (VDDAD). . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.7.2
ADC Analog Ground Pin (VSSAD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
5.7.3
ADC Voltage Reference High Pin (VREFH) . . . . . . . . . . . . . . . . . . . . 70
5.7.4
ADC Voltage Reference Low Pin (VREFL) . . . . . . . . . . . . . . . . . . . . 70
5.7.5
ADC Voltage In (VADIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
5.8
I/O Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5.8.1
ADC Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5.8.2
ADC Data Register High and Data Register Low . . . . . . . . . . . . . . . 73
5.8.2.1
Left Justified Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.8.2.2
Right Justified Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.8.2.3
Left Justified Signed Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.8.2.4
Eight Bit Truncation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.8.3
ADC Clock Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Section 6. Break Module (BRK)
6.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
6.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
6.3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
6.3.1
Flag Protection During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . 79
6.3.2
TIM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
6.3.3
COP During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
6.4
Break Module Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
6.4.1
Break Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . 80
6.4.2
Break Address Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.4.3
Break Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.4.4
Break Flag Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.5
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Section 7. Clock Generator Module (CGM)
7.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
7.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
7.3
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
7.3.1
Crystal Oscillator Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
7.3.2
Phase-Locked Loop Circuit (PLL). . . . . . . . . . . . . . . . . . . . . . . . . . . 85
7.3.3
PLL Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
7.3.4
Acquisition and Tracking Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
7.3.5
Manual and Automatic PLL Bandwidth Modes . . . . . . . . . . . . . . . . . 86
7.3.6
Programming the PLL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88


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