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GTL2002D Datasheet(PDF) 2 Page - NXP Semiconductors |
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GTL2002D Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 2 page www.nxp.com © 2007 NXP N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Date of release: March 2007 Document order number: 9397 750 15911 Printed in the USA applicationthatrequiresuni-or bidirectionalvoltagetranslationfor voltagelevelsbetween1and5V. Theopen-drainconstruction,which eliminatestheneedfordirectional control,makesthetranslatorsidealfor designsthatcombinelow-voltage(1.0to 1.8V)andlegacy(3.3and/or5.5V)I2C- bussignals.Thetranslatorscanchange I2C-bussignallevelsatspeedsupto3.4 MHz. Thetranslatorscanalsobeusedin designsthatcombineGTLandLVTTL/ TTLsignals,shiftingprocessorsideband I/Osignalsbetweenvoltagelevels. Bidirectional voltage translation Toconfigurethetranslatorsfor bidirectionalclamping,theG REFinput mustbeconnectedtoD REFandboth pinsmustbepulledtothehigh-side V CCthroughapull-upresistor(typically 200k Ω).AfiltercapacitoronD REFis recommended. TheCPUoutputcanbesetastotem poleoropendrain(pull-upresistorsmay berequired),ascanthechipsetoutput (pull-upresistorsarerequiredtopull theDnoutputstoV CC).Nodirectional controlisneededifbothoutputsareset asopendrain.Ifeitheroutputissetto totempole,however,theremaybehigh- to-lowcontentionsineitherdirection.To preventthis,setdataasunidirectional oruse3-stateableoutputswitha mechanismfordirectioncontrol. TheoppositesideofS REFisconnected totheCPUpower-supplyvoltage.When D REFisconnectedthrougha200-kΩ resistortoV CCandSREFissetbetween1.0 andV CCminus1.5V,theoutputofeach Snhasamaximumoutputvoltageequal Note: In Europe and Asia, for tube orders, add “, 112” (e.g. GTL2010PW, 112), and for tape and reel orders, replace “-T” with “, 118” (e.g. GTL2010PW, 118). toS REFandtheoutputofeachDnhasa maximumoutputvoltageequaltothe voltageofthepull-upresistor(3.3and/or 5V). Unidirectional voltage translation Thesameconfigurationcanbeusedfor one-wayvoltagetranslation,eitherup ordown.Fordown-onlytranslation,if thechipsetI/Oareopendrain,pull-up resistorsarerequired. Forup-onlytranslation,apull-upresistor isrequiredonthehigh-sidevoltage(Dn). Thisisbecausethetranslatorwillonly passthereferencesourcevoltage(S REF) asahighwhendoingup-translation.The driveronthelow-sidevoltageonlyneeds apull-upresistorifitissetasopendrain. Formoreinformationonusingthe GTL20xxfamily,pleasereferto ApplicationNoteAN10145atwww.nxp. com/interface. Package Container GTL2000 GTL2002 GTL2003 GTL2010 SO Tube -- GTL2002D -- -- T&R -- GTL2002D-T -- -- SSOP Tube GTL2000DL -- -- -- T&R GTL2000DL-T -- -- -- TSSOP Tube GTL2000DGG -- GTL2003PW GTL2010PW T&R GTL2000DGG-T GTL2002DP-T GTL2003PW-T GTL2010PW-T HVQFN T&R -- -- -- GTL2010BS-T DHVQFN T&R -- -- GTL2003BQ-T -- VSSOP T&R -- GTL2002DC-T -- -- XQFN T&R -- GTL2002GM-T -- -- Ordering information 1 2 3 4 5 6 7 8 9 10 11 12 GND SREF 48 47 46 45 44 43 42 41 GREF D2 40 39 38 37 D9 S1 S3 S4 S10 S6 S7 S9 S2 S5 S8 D1 DREF D4 D6 D7 D8 D10 D5 D3 13 S11 S12 36 35 34 33 32 31 30 29 D11 D14 28 27 26 25 D21 S13 S15 S16 S22 S18 S19 S21 S14 S17 S20 D13 D12 D16 D18 D19 D20 D22 D17 D15 14 15 16 17 18 19 20 21 22 23 24 GTL2002 GTL2003 GTL2010 GTL20xx pinout diagram GND SREF S1 S2 GTL2002 GREF DREF D1 D2 S3 S4 S5 Sn D3 D4 D5 Dn CPU I/O Chipset I/O Chipset I/O VCORE VCC VCC 3.3 V 5 V 1.8 V 1.5 V 1.2 V 1.0 V 200 K Increase bit size by using 8-bit GTL2003 or 10-bit GTL2010 or 22-bit GTL2000 Totem Pole or Open Drain I/O Typical configuration for bidirectional voltage translation |
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