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SSTUB32864 Datasheet(PDF) 2 Page - NXP Semiconductors |
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SSTUB32864 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 19 page SSTUB32864_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 26 March 2007 2 of 19 NXP Semiconductors SSTUB32864 1.8 V configurable registered buffer for DDR2-800 RDIMM applications 2. Features I Configurable register supporting DDR2 Registered DIMM applications I Configurable to 25-bit 1 : 1 mode or 14-bit 1 : 2 mode I Controlled output impedance drivers enable optimal signal integrity and speed I Meets SSTUB32864 JEDEC specification speed performance I Supports up to 450 MHz clock frequency of operation I Optimized pinout for high-density DDR2 module design I Chip-selects minimize power consumption by gating data outputs from changing state I Supports SSTL_18 data inputs I Differential clock (CK and CK) inputs I Supports LVCMOS switching levels on the control and RESET inputs I Single 1.8 V supply operation (1.7 V to 2.0 V) I Available in 96-ball, 13.5 mm × 5.5 mm, 0.8 mm ball pitch LFBGA package 3. Applications I 400 MT/s to 800 MT/s DDR2 registered DIMMs without parity 4. Ordering information Table 1. Ordering information Tamb =0 °Cto+70 °C. Type number Solder process Package Name Description Version SSTUB32864EC/G Pb-free (SnAgCu solder ball compound) LFBGA96 plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 × 5.5 × 1.05 mm SOT536-1 |
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