FLASH MEMORY

1

K9F5616U0B-YCB0,YIB0,PCB0,PIB0

K9F5616U0B-DCB0,DIB0,HCB0,HIB0

K9F5608U0B-YCB0,YIB0,PCB0,PIB0

K9F5608U0B-DCB0,DIB0,HCB0,HIB0

K9F5608Q0B-DCB0,DIB0,HCB0,HIB0

K9F5616Q0B-DCB0,DIB0,HCB0,HIB0

K9F5608U0B-VCB0,VIB0,FCB0,FIB0

Document Title

32M x 8 Bit , 16M x 16 Bit NAND Flash Memory

Revision History

The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right

to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have

any questions, please contact the SAMSUNG branch office near you.

Revision No.

0.0

0.1

0.2

0.3

0.4

Remark

Advance

History

Initial issue.

At Read2 operation in X16 device

-min. Value: 7mA -->3mA

-typ. Value: 8mA -->4mA

2. AC parameter is changed.

tRP(min.) : 30ns --> 25ns

3. WP pin provides hardware protection and is recommended to be kept

1

µs is required before internal circuit gets ready for any command

sequences as shown in Figure 15.

---> WP pin provides hardware protection and is recommended to be

minimum 10

µs is required before internal circuit gets ready for any

command sequences as shown in Figure 15.

1. X16 TSOP1 pin is changed.

: #36 pin is changed from VccQ to N.C .

1. In X16 device, bad block information location is changed from 256th

byte to 256th and 261th byte.

2. tAR1, tAR2 are merged to tAR.(page 12)

(before revision) min. tAR1 = 20ns , min. tAR2 = 50ns

(after

revision) min. tAR = 10ns

3. min. tCLR is changed from 50ns to 10ns.(page12)

4. min. tREA is changed from 35ns to 30ns.(page12)

5. min. tWC is changed from 50ns to 45ns.(page12)

6. Unique ID for Copyright Protection is available

-The device includes one block sized OTP(One Time Programmable),

which can be used to increase system security or to provide

identification capabilities. Detailed information can be obtained by

contact with Samsung.

7. tRHZ is divide into tRHZ and tOH.(page 12)

- tRHZ : RE High to Output Hi-Z

- tOH : RE High to Output Hold

8. tCHZ is divide into tCHZ and tOH.(page 12)

- tCHZ : CE High to Output Hi-Z

- tOH : CE High to Output Hold

Draft Date

May. 15th 2001

Sep. 20th 2001

Nov. 5th 2001

Feb. 15th 2002

Apr. 15th 2002

Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.

http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html