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KB8822 Datasheet(PDF) 4 Page - Samsung semiconductor |
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KB8822 Datasheet(HTML) 4 Page - Samsung semiconductor |
4 / 21 page PRELIMINARY SPECIFICATION (V1.5) FREQUENCY SYNTHESIZER KB8821/22/23 4 99-06-15 PIN DESCRIPTION Pin No Symbol I / O Description 1 VDD1 - Power supply voltage input for the RF PLL part. VDD1 must equal VDD2. In order to reject supply noise, bypass capacitors must be placed as close as possible to this pin and be connected directly to the ground plane. 2 Vp1 - Power supply voltage input for RF charge pump( ≥ VDD1). 3 CPoRF O Internal RF charge pump output for connection to an external loop filter whose filtered output drives an external VCO. 4 GND - Ground for RF digital blocks. 5 finRF I RF prescaler input. The signal comes from the external VCO. 6 finRF I The complementary input of the RF prescaler. A bypass capacitor must be placed as close as possible to this pin and be connected directly to the ground plane. The bypass capacitor is optional with some loss of sensitivity. 7 GND - Ground for RF analog blocks. 8 OSCin I Reference counter input. TCXO is connected via a coupling capacitor. 9 GND - Ground for IF digital blocks. 10 foLD O Multiplexed output of the RF/IF programmable counters, the reference counters, the lock detect signals and the shift registers. The output level is CMOS level. (see fout Programmable Truth Table) 11 CLOCK I CMOS clock input. Serial data for the various counters is transfered into the 22-bit shift register on the rising edge of the clock signal. 12 DATA I Binary serial data input. The MSB of CMOS input data is entered first. The control bits are on the last two bits. CMOS input. 13 LE I Load enable CMOS input. When LE becomes high, the data in the shift register is loaded into one of the four latches(by the control bits). 14 GND - Ground for IF analog blocks. 15 finIF I The complementary input of the IF prescaler. A bypass capacitor must be placed as close as possible to this pin and be connected directly to the ground plane. The bypass capacitor is optional with some loss of sensitivity. 16 finIF I IF prescaler input. The signal comes from the external VCO. 17 GND - Ground for IF digital blocks. 18 CPoIF O Internal IF charge pump output for connection to an external loop filter whose filtered output drives an external VCO. 19 Vp2 - Power supply voltage input for IF charge pump( ≥ VDD2) 20 VDD2 - Power supply voltage input for the IF PLL part. VDD1 must equal VDD2. In order to reject supply noise, bypass capacitors must be placed as close as possible to this pin and be connected directly to the ground plane. |
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