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KM4132G271AQ-10 Datasheet(PDF) 11 Page - Samsung semiconductor |
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KM4132G271AQ-10 Datasheet(HTML) 11 Page - Samsung semiconductor |
11 / 48 page KM4132G271A CMOS SGRAM Rev.0 (August 1997) 1. Apply power and start clock, Attempt to maintain CKE= "H", DQM= "H" and the other pins are NOP condition at the inputs. 2. Maintain stable power, stable clock and NOP input condition for a minimum of 200§Á. 3. Issue precharge commands for all banks of the devices. 4. Issue 2 or more auto-refresh commands. 5. Issue a mode register set command to initialize the mode register. cf.) Sequence of 4 & 5 may be changed. The device is now ready for normal operation. Note : 1. If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled. 2. The full column burst(256bit) is available only at Sequential mode of burst type. 3. If LC and LM both high(1), data of mask and color register will be unknown. Register Programmed with MRS (Note 1) Address A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Function W.B.L TM CAS Latency BT Burst Length (Note 2) Test Mode CAS Latency Burst Type Burst Length A8 A7 Type A6 A5 A4 Latency A3 Type A2 A1 A0 BT=0 BT=1 0 0 Mode Register Set 0 0 0 Reserved 0 Sequential 0 0 0 1 Reserved 0 1 Vendor Use Only 0 0 1 - 1 Interleave 0 0 1 2 Reserved 1 0 0 1 0 2 0 1 0 4 4 1 1 0 1 1 3 0 1 1 8 8 Write Burst Length 1 0 0 Reserved 1 0 0 Reserved Reserved A9 Length 1 0 1 Reserved 1 0 1 Reserved Reserved 0 Burst 1 1 0 Reserved 1 1 0 Reserved Reserved 1 Single Bit 1 1 1 Reserved 1 1 1 256(Full) Reserved Special Mode Register Programmed with SMRS Address A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Function X LC LM X (Note 3) Load Color Load Mask A6 Function A5 Function 0 Disable 0 Disable 1 Enable 1 Enable POWER UP SEQUENCE MODE REGISTER FIELD TABLE TO PROGRAM MODES |
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