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| S3C7295 |
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SAMSUNG |
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6 page
PRODUCT OVERVIEW S3C7295/P7295 1-6 Table 1-1. S3C7295 Pin Descriptions (Continued) Pin Name Pin Type Description Circuit Type Number Share Pin K0–K3 I/O External interrupt (triggering edge is selectable) E-1 11–8 P0.0–P0.3 VDD – Power supply – 12 – VSS – Ground – 13 – RESET I Reset input (active low) B 19 – CA, CB – Capacitor terminal for voltage doubling – 20, 21 – VCL0 – LCD power supply input – 22 – BIAS O Doubling voltage level output – 23 – Xin, Xout – Crystal, ceramic or RC oscillator pins for system clock – 15, 14 – XTin, XTout – Crystal oscillator pins for subsystem clock – 17, 18 – TEST I Test input (must be connected to VSS) – 16 – NOTE: Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode. |
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