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S3P80F7 Datasheet(PDF) 8 Page - Samsung semiconductor |
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S3P80F7 Datasheet(HTML) 8 Page - Samsung semiconductor |
8 / 34 page PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) 1-8 Table 1-2. Pin Descriptions of 32-SOP Pin Names Pin Type Pin Description Circuit Type 32 Pin No. Shared Functions P0.0–P0.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors are assignable by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. SED & R circuit built in P0 for STOP releasing. 1 17–24 Ext. INT P1.0–P1.7 I/O I/O port with bit-programmable pins. Configurable to input mode or output mode. Pin circuits are either push-pull or n-channel open-drain type. 2 9–16 – P2.0–P2.3 P2.4–P2.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors can be assigned by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/disable, and interrupt pending control. SED & R circuit built in P2 for STOP releasing. 1 25–28 29,5, 6,8 Ext. INT P3.0 P3.1 I/O 2-bit I/O port with bit-programmable pins. Configurable to input mode, push-pull output mode, or n-channel open-drain output mode. Input mode with pull-up resistors can be assigned by software. The two port 3 pins have high current drive capability. 3 4 30,31 T0PWM/ T0CAP/T1CAP REM/T0CK X IN, XOUT – System clock input and output pins – 2,3 – RESET I System reset signal input pin and back-up mode input. 8 7 – TEST I Test signal input pin (for factory use only; must be connected to VSS). – 4 – V DD – Power supply input pin – 32 – V SS – Ground pin – 1 – |
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