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S3C9644 Datasheet(PDF) 4 Page - Samsung semiconductor |
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S3C9644 Datasheet(HTML) 4 Page - Samsung semiconductor |
4 / 26 page PRODUCT OVERVIEW S3C9644/C9648/P9648 1-4 PIN ASSIGNMENTS P3.1 P3.0 INT0 / P2.0 INT0 / P2.1 INT0 / P2.2 INT0 / P2.3 INT0 / P2.4 INT0 / P2.5 INT0 / P2.6 INT0 / P2.7 VDD VSS XOUT XIN TEST INT1 / P4.0 INT1 / P4.1 RESET INT1 / P4.2 INT1 / P4.3 P1/7 S3C9644 S3C9648 42-SDIP (Top View) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 P3.2 P3.3/CLO D+/PS2 D-/PS2 3.3 V OUT NC P0.0 / INT P0.1 / INT P0.2 / INT P0.3 / INT P0.4 / INT P0.5 / INT P0.6 / INT P0.7 / INT P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 Figure 1-2. Pin Assignment Diagram (42-Pin SDIP Package) |
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