DATA SHEET

S524AD0XD1/D0XF1 SERIAL EEPROM

8-7

Master

SCL Line

Data from

Transmitter

ACK

ACK from

Receiver

Bit 9

Bit 1

Figure 8-8. Acknowledge Response from Receiver

•

Slave Address: After the master initiates a start condition, it must output the address of the device to be

accessed. The most significant four bits of the slave address are called the “device identifier.” The identifier

for the S524AD0XD1/D0XF1 is “1010B”. The next three bits comprise the address of a specific device. The

device address is defined by the state of the A0, A1, and A2 pins. Using this addressing scheme, you can

cascade up to eight S524AD0XD1/D0XF1s on the bus (see Figure 8-9 below).

•

Read/Write: The final (eighth) bit of the slave address defines the type of operation to be performed. If the

Slave

Address

First Word

Address

Second Word

Address

NOTES:

1.

The A14 is "don't care" for the S524AD0XD1.

2.

X = Don't care

1

0

1

0

A2

A1

A0

R/W

Device Identifier

Device Select

First (High) Address

Second (Low) Address

A13

A12

A11

A10

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

Figure 8-9. Device Address