DATA SHEET

S524L50D51 SERIAL EEPROM

5-5

FUNCTION DESCRIPTION

I

The S524L50D51 supports the I

serial data line (SDA) and a serial clock line (SCL). The SDA and the SCL lines must be connected to V

pull-up resistor that is located somewhere on the bus.

Any device that puts data onto the bus is defined as a “transm itter” and any device that gets data from the bus is

a “receiver.” The bus is controlled by a master device which generates the serial clock and start/stop conditions,

controlling bus access. Only one S524L50D51 devices can be connected to the I

6). Both the master and slaves can operate as a transmitter or a receiver, but the master device determines

which bus operating mode would be active.

SDA

R

R

SCL

S524L50D51

Slave

Bus Master

(Transmitter/

Receiver)

Master

Figure 5-6. Typical Configuration