2

1

3

4

7

8

6

5

FB

NC

GND

OUT

EN

NR/SS

DNC

IN

TPS7A49xx

www.ti.com

SBVS121A – AUGUST 2010 – REVISED SEPTEMBER 2010

PIN CONFIGURATION

DGN PACKAGE

MSOP-8

(TOP VIEW)

PIN DESCRIPTIONS

TPS7A49xx

NAME

NO.

DESCRIPTION

OUT

1

Regulator output. A capacitor

≥ 2.2mF must be tied from this pin to ground to assure stability.

FB

2

This pin is the input to the control-loop error amplifier. It is used to set the output voltage of the device.

NC

3

Not internally connected. This pin may either be left open or tied to GND.

GND

4

Ground

EN

5

Noise reduction pin. Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap.

NR/SS

6

This capacitor allows RMS noise to be reduced to very low levels and also controls the soft-start function.

DNC

7

DO NOT CONNECT. Do not route this pin to any electrical net, not even GND or IN.

IN

8

Input supply

PowerPAD

Must either be left open or tied to ground. Solder to printed circuit board (PCB) plane to enhance thermal performance.

Copyright © 2010, Texas Instruments Incorporated

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