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Multi-Output Controller with Integrated MOSFET

Drivers for AMD SVI Capable Mobile CPUs

ISL6265C

The ISL6265C is a multi-output controller with embedded

gate drivers. A single-phase controller powers the

Northbridge (VDDNB) portion of the CPU. The two

remaining controller channels can be configured for

two-phase or individual single-phase outputs. For

uniplane CPU applications, the ISL6265C is configured as

a two-phase buck converter. This allows the controller to

interleave channels to effectively double the output

voltage ripple frequency, and thereby reduce output

voltage ripple amplitude with fewer components, lower

component cost, reduced power dissipation, and smaller

area. For dual-plane processors, the ISL6265C can be

configured as independent single-phase controllers

powering VDD0 and VDD1.

Technology™, Intersil’s Robust Ripple Regulator

modulator. Compared with the traditional buck regulator,

™ has a faster transient response. This

switching frequency during a load transient.

The Serial VID Interface (SVI) allows dynamic

adjustment of the Core and Northbridge output voltages

independently and in combination from 0.500V to 1.55V.

Core and Northbridge output voltages achieve a 0.5%

system accuracy over-temperature.

A unity-gain differential amplifier is provided for remote

CPU die sensing. This allows the voltage on the CPU die

to be accurately regulated per AMD mobile CPU

specifications. Core output current sensing is realized

using lossless inductor DCR sensing. All outputs feature

overcurrent, overvoltage and undervoltage protection.

Features

• Core Configuration Flexibility

- Dual Plane, Single-Phase Controllers

- Uniplane, Two-Phase Controller

• Precision Voltage Regulators

- 0.5% System Accuracy Over-temperature

• Voltage Positioning with Adjustable Load Line and Offset

• Internal Gate Drivers with 2A Driving Capability

• Differential Remote CPU Die Voltage Sensing

• Core Differential Current Sensing: DCR or Resistor

• Serial VID Interface

- Two Wire Clock and Data Bus

- 0.500V to 1.55V in 12.5mV Steps

- Supports PSI_L Power-Saving Mode

• Core Outputs Feature Phase Shedding with PSI_L

• Adjustable Output-Voltage Offset

• Digital Soft-Start of all Outputs

• User Programmable Switching Frequency

• Static and Dynamic Current Sharing (Uniplane Core)

• Overvoltage, Undervoltage, and Overcurrent Protection

• Pb-Free (RoHS compliant)

Applications*(see page 26)

• AMD Griffin Platform CPU

• Notebook Core/GPU Voltage Regulators

•See FN6884 for “Multi-Output Controller with Integrated

MOSFET Drivers for AMD SVI Capable Mobile CPUs”

Simplified System Diagram

CORE_1

ISL6265C

CORE_0

POWER

STAGE

POWER

STAGE

POWER

STAGE

July 28, 2010

FN6976.1