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ISL97672IRZ Datasheet(PDF) 4 Page - Intersil Corporation |
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ISL97672IRZ Datasheet(HTML) 4 Page - Intersil Corporation |
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4 / 17 page  ISL97672 4 FN7632.0 June 24, 2010 Absolute Maximum Ratings (TA = +25°C) Thermal Information VIN, EN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V FAULT . . . . . . . . . . . . . . . . . . . . . VIN - 8.5V to VIN + 0.3V VDC, COMP, RSET, PWM, OVP, /FLAG, FSW . . . -0.3V to 5.5V CH0 - CH5, LX . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 45V PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V Above voltage ratings are all with respect to AGND pin ESD Rating Human Body Model (Tested per JESD22-A114E) . . . . . 3kV Machine Model (Tested per JESD22-A115-A) . . . . . . . 300V Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . 1kV Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 20 Ld QFN Package (Notes 4, 5, 7) . 40 2.5 Thermal Characterization (Typical) PSIJT (°C/W) 20 Ld QFN Package (Note 6) . . . . . . . . . . . . 1 Maximum Continuous Junction Temperature . . . . . . +125°C Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside assumed under ideal case temperature. 6. PSIJT is the junction-to-top thermal resistance. If the package top temperature can be measured, with this rating then the die junction temperature can be estimated more accurately than the θJC and θJC thermal resistance ratings. 7. Refer to JESD51-7 high effective thermal conductivity board layout for proper via and plane designs. Electrical Specifications All specifications below are tested at TA = 25°C; VIN = 12V, EN = 5V, RSET = 20.1kΩ, unless otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +85°C. PARAMETER DESCRIPTION CONDITION MIN (Note 8) TYP MAX (Note 8) UNIT GENERAL VIN (Note 9) Backlight Supply Voltage TC = <+60°C TA = +25°C 4.5 26.5 V IVIN_STBY VIN Shutdown Current 10 µA VOUT Output Voltage 4.5V < VIN ≤ 26V, FSW = 600kHz 45 V 8.55V < VIN ≤ 26V, FSW = 1.2MHz 45 V 4.5V < VIN ≤ 8.55V, FSW =1.2MHz VIN/0.19 V Vuvlo Undervoltage Lock-out Threshold 2.6 3.3 V Vuvlo_hys Undervoltage Lock-out Hysteresis 275 mV ENABLE AND PWM GENERATOR VIL Guaranteed Range for PWM Input Low Voltage 0.8 V VIH Guaranteed Range for PWM Input High Voltage 1.5 VDD V FPWM PWM Input Frequency Range 200 30,000 Hz tON Minimum On Time 250 350 ns |
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