ADP320ACPZ331815R7 datasheet(4/20 Pages) AD

Part #	ADP320ACPZ331815R7

Description	Triple, 200 mA, Low Noise, High PSRR Voltage Regulator

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Manufacturer	AD [Analog Devices]

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ADP320

Rev. 0 | Page 4 of 20

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

POWER SUPPLY REJECTION RATIO

PSRR

VIN = 1.8 V, VOUT = 0.8 V, IOUT = 100 mA

100 Hz

70

dB

1 kHz

70

dB

10 kHz

70

dB

100 kHz

60

dB

1 MHz

40

dB

VIN = 3.8 V, VOUT = 2.8 V, IOUT = 100 mA

100 Hz

68

dB

1 kHz

62

dB

10 kHz

68

dB

100 kHz

60

dB

1 MHz

40

dB

1 Based on an end-point calculation using 1 mA and 200 mA loads.

2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 1.8 V.

3 Start-up time is defined as the time between the rising edge of ENx to VOUTx being at 90% of its nominal value.

4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.

INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS

Table 2.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

MINIMUM INPUT AND OUTPUT CAPACITANCE1

CMIN

TA = −40°C to +125°C

0.70

μF

CAPACITOR ESR

RESR

TA = −40°C to +125°C

0.001

1

Ω

1 The minimum input and output capacitance should be greater than 0.70 μF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended,

Y5V and Z5U capacitors are not recommended for use with LDOs.

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