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PT6315-S Datasheet(PDF) 4 Page - Princeton Technology Corp |
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PT6315-S Datasheet(HTML) 4 Page - Princeton Technology Corp |
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4 / 21 page  Tel:886-2-66296288 Fax:886-2-29174598 URL:http://www.princeton.com.tw PT6315-S V1.9 - 4 - September, 2005 VFD Driver/Controller IC PT6315-S PIN DESCRIPTION Pin Name I/O Description Pin No. CLK I Clock Input Pin This pin reads serial data at the rising edge and outputs data at the falling edge. 1 STB I Serial Interface Strobe Pin The data input after the STB has fallen is processed as a command. When this pin is “HIGH”, CLK is ignored. 2 K1 to K2 I Key Data Input Pins The data sent to these pins are latched at the end of the display cycle. 3, 4 VSS - Logic Ground Pin 5, 25 VDD - Logic Power Supply 6, 24 SG1/KS1 to SG8/KS8 O High Voltage Segment Output Pins Also acts as the Key Source 7 to 14 VEE - Pull Down Level 15 SG9/GR8 to SG12/GR5 O High Voltage Segment/Grid Output Pins 16 to 19 GR4 to GR1 O High Voltage Grid Output Pins 20 to 23 OSC I Oscillator Input Pin A resistor is connected to this pin to determine the oscillation frequency. 26 DOUT O Data Output Pin (N-Channel, Open Drain) This pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). 27 DIN I Data Input Pin This pin inputs serial data at the rising edge of the shift clock (starting from the lower bits). 28 |
Similar Part No. - PT6315-S_10 |
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Similar Description - PT6315-S_10 |
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