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SST25VF020B-80-4C-QAE Datasheet(PDF) 6 Page - Silicon Storage Technology, Inc |
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SST25VF020B-80-4C-QAE Datasheet(HTML) 6 Page - Silicon Storage Technology, Inc |
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6 / 33 page  6 Data Sheet 2 Mbit SPI Serial Flash SST25VF020B ©2010 Silicon Storage Technology, Inc. S71417-02-000 04/10 Status Register The software status register provides status on whether the flash memory array is available for any Read or Write oper- ation, whether the device is Write enabled, and the state of the Memory Write protection. During an internal Erase or Program operation, the status register may be read only to determine the completion of an operation in progress. Table 3 describes the function of each bit in the software status register. Software Status Register 1 The Software Status Register 1 is an additional register that contains Top Sector and Bottom Sector Protection bits. These register bits are read/writable and determine the lock and unlock status of the top and bottom sectors. Table 4 describes the function of each bit in the Software Status Register 1. Busy The Busy bit determines whether there is an internal Erase or Program operation in progress. A “1” for the Busy bit indi- cates the device is busy with an operation in progress. A “0” indicates the device is ready for the next valid operation. Write Enable Latch (WEL) The Write-Enable-Latch bit indicates the status of the inter- nal memory Write Enable Latch. If the Write-Enable-Latch bit is set to “1”, it indicates the device is Write enabled. If the bit is set to “0” (reset), it indicates the device is not Write enabled and does not accept any memory Write (Program/ Erase) commands. The Write-Enable-Latch bit is automati- cally reset under the following conditions: TABLE 3: Software Status Register Bit Name Function Default at Power-up Read/Write 0 BUSY 1 = Internal Write operation is in progress 0 = No internal Write operation is in progress 0R 1 WEL 1 = Device is memory Write enabled 0 = Device is not memory Write enabled 0R 2 BP0 Indicates current level of block write protection (See Table 5) 1 R/W 3 BP1 Indicates current level of block write protection (See Table 5) 1 R/W 4:5 RES Reserved for future use 0 N/A 6 AAI Auto Address Increment Programming status 1 = AAI programming mode 0 = Byte-Program mode 0R 7 BPL 1 = BP1, BP0 are read-only bits 0 = BP1, BP0 are read/writable 0R/W T3.0 1417 TABLE 4: Software Status Register 1 Bit Name Function Default at Power-up Read/Write 0:1 RES Reserved for future use 0 N/A 2 TSP Top Sector Protection status 1 = Indicates highest sector is write locked 0 = Indicates highest sector is Write accessible 0R/W 3 BSP Bottom Sector Protection status 1 = Indicates lowest sector is write locked 0 = Indicates lowest sector is Write accessible 0R/W 4:7 RES Reserved for future use 0 N/A T4.0 1417 |
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