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SX1511B Datasheet(PDF) 10 Page - Semtech Corporation |
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SX1511B Datasheet(HTML) 10 Page - Semtech Corporation |
10 / 43 page ADVANCED COMMUNICATIONS & SENSING Rev 3 – 9 th Sept. 2010 10 www.semtech.com SX1510B/SX1511B/SX1512B World’s Lowest Voltage Level Shifting GPIO with LED Driver and Keypad Engine Symbol Description Conditions Min Typ Max Unit VOL Low level output voltage - -0.4 - 0.3 V VDDM >= 2V - - 8 IOHM High level output source current VDDM < 2V - - 2 mA VDDM >= 2V - - 8 IOLM Low level output sink current VDDM < 2V - - 4 mA fSCK SCK max clock frequency - - 20 (4) - MHz tSCK,LOW SCK low time (% of SCK cycle) - 45 - 55 % tSCK,HIGH SCK high time (% of SCK cycle) - 45 - 55 % tSI,SETUP SI setup time - 9 - - ns tSI,HOLD SI hold time - 9 - - ns tSO,VALID SO valid time (% of SCK cycle) After SCK falling edge - - 33 (4) % tNSS,SCK NSS low to SCK rising edge - 25 - - ns tSCK,NSS SCK falling edge to NSS high - 25 - - ns tNSS,HIGH NSS rising to falling edge - 25 - - ns Miscellaneous RPULL Programmable pull-up/down resistors for IO[0-7] - - 42 - k Internal (SX1510B) 1.1 2 3 Internal (SX1511/12B) 1.3 2 2.6 fOSC Oscillator frequency External from OSCIN (40-60% duty cycle) - - 2.6 MHz (1) Assuming no load connected to outputs and inputs fixed to VCC1,2 or GND. (2) Can be increased by tying together and driving simultaneously several I/Os. (3) SX1511/12B with RegHighInput bit enabled (VCCx min =1.65V), else 3.6V (VCCx min = 1.2V) (4) fSCK is calculated assuming a tSO,VALID of maximum 1/3 of SCK cycle. This gives 1/6 of SCK cycle as setup time to the host controller. For systems where the setup time can be relaxed, tSO,VALID is also shown in §3 to allow the user to calculate the maximum SPI frequency for individual systems. Table 6 – Electrical Specifications |
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