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AT91SAM9G45-CU Datasheet(PDF) 10 Page - ATMEL Corporation |
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AT91SAM9G45-CU Datasheet(HTML) 10 Page - ATMEL Corporation |
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10 / 56 page  10 6438ES–ATARM–21-Jun-10 AT91SAM9G45 Notes: 1. Refer to peripheral multiplexing tables in Section 9.4 “Peripheral Signals Multiplexing on I/O Lines” for these signals. 2. When configured as an input, the NRST pin enables asynchronous reset of the device when asserted low. This allows con- nection of a simple push button on the NRST pin as a system-user reset. 3. Programming of this pull-up resistor is performed independently for each I/O line through the PIO Controllers. After reset, all the I/O lines default as inputs with pull-up resistors enabled, except those which are multiplexed with the External Bus Inter- face signals that require to be enabled as Peripheral at reset. This is explicitly indicated in the column “Reset State” of the peripheral multiplexing tables. AD3Y M Analog input channel 3 or Touch Screen Left channel Analog VDDANA Multiplexed with AD3 GPAD4-GPAD7 Analog Inputs Analog VDDANA TSADTRG ADC Trigger Input VDDANA TSADVREF ADC Reference Analog VDDANA Table 3-1. Signal Description List (Continued) Signal Name Function Type Active Level Reference Voltage Comments |
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