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ATMEGA128A Datasheet(PDF) 7 Page - ATMEL Corporation |
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ATMEGA128A Datasheet(HTML) 7 Page - ATMEL Corporation |
7 / 22 page 19 8151GS–AVR–07/10 ATmega128A JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a Reset occurs. The TDO pin is tri-stated unless TAP states that shift out data are entered. Port F also serves the functions of the JTAG interface. In ATmega103 compatibility mode, Port F is an input Port only. 2.3.9 Port G (PG4:PG0) Port G is a 5-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port G output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up resistors are activated. The Port G pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port G also serves the functions of various special features. The port G pins are tri-stated when a reset condition becomes active, even if the clock is not running. In ATmega103 compatibility mode, these pins only serves as strobes signals to the external memory as well as input to the 32 kHz Oscillator, and the pins are initialized to PG0 = 1, PG1 = 1, and PG2 = 0 asynchronously when a reset condition becomes active, even if the clock is not running. PG3 and PG4 are oscillator pins. 2.3.10 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock is not running. The minimum pulse length is given in “System and Reset Characteristics” on page 324. Shorter pulses are not guaranteed to generate a reset. 2.3.11 XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. 2.3.12 XTAL2 Output from the inverting Oscillator amplifier. 2.3.13 AVCC AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con- nected to V CC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. 2.3.14 AREF AREF is the analog reference pin for the A/D Converter. 2.3.15 PEN PEN is a programming enable pin for the SPI Serial Programming mode, and is internally pulled high . By holding this pin low during a Power-on Reset, the device will enter the SPI Serial Pro- gramming mode. PEN has no function during normal operation. |
Similar Part No. - ATMEGA128A_10 |
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Similar Description - ATMEGA128A_10 |
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