3

8183BS–AVR–03/10

ATtiny24A/44A

1.1

Pin Descriptions

1.1.1

VCC

Supply voltage.

1.1.2

GND

Ground.

1.1.3

Port B (PB3...PB0)

Port B is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability except PB3 which has the RESET capability. To use pin PB3 as an I/O pin, instead of

RESET pin, program (‘0’) RSTDISBL fuse. As inputs, Port B pins that are externally pulled low

will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a

reset condition becomes active, even if the clock is not running.

Port B also serves the functions of various special features of the ATtiny24A/44A as listed in

1.1.4

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running and provided the reset pin has not been disabled. The min-

generate a reset.

The reset pin can also be used as a (weak) I/O pin.

1.1.5

Port A (PA7...PA0)

Port A is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port A output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port A has alternate functions as analog inputs for the ADC, analog comparator, timer/counter,