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SST39VF040-75-4I-NME Datasheet(PDF) 6 Page - Silicon Storage Technology, Inc |
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SST39VF040-75-4I-NME Datasheet(HTML) 6 Page - Silicon Storage Technology, Inc |
6 / 24 page 6 Data Sheet 512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040 SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040 ©2010 Silicon Storage Technology, Inc. S71150-14-000 01/10 FIGURE 5: Pin Assignment for 34-ball WFBGA (4mm x 6mm) for 1 Mbit and 2 Mbit TABLE 2: Pin Description Symbol Pin Name Functions AMS1-A0 1. AMS = Most significant address AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010, A17 for SST39LF/VF020, and A18 for SST39LF/VF040 Address Inputs To provide memory addresses. During Sector-Erase AMS-A12 address lines will select the sector. During Block-Erase AMS-A16 address lines will select the block. DQ7-DQ0 Data Input/output To output data during Read cycles and receive input data during Write cycles. Data is internally latched during a Write cycle. The outputs are in tri-state when OE# or CE# is high. CE# Chip Enable To activate the device when CE# is low. OE# Output Enable To gate the data output buffers. WE# Write Enable To control the Write operations. VDD Power Supply To provide power supply voltage: 3.0-3.6V for SST39LF512/010/020/040 2.7-3.6V for SST39VF512/010/020/040 VSS Ground NC No Connection Unconnected pins. T2.1 1150 TABLE 3: Operation Modes Selection Mode CE# OE# WE# DQ Address Read VIL VIL VIH DOUT AIN Program VIL VIH VIL DIN AIN Erase VIL VIH VIL X1 1. X can be VIL or VIH, but no other value. Sector address, XXH for Chip-Erase Standby VIH X X High Z X Write Inhibit X VIL X High Z/ DOUT X XX VIH High Z/ DOUT X Product Identification Software Mode VIL VIL VIH See Table 4 T3.4 1150 A2 A1 A0 CE# VSS A17 VDD A16 A12 A8 A14 WE# A18 A15 A6 A9 A13 A7 A5 A11 A4 NC1 NC2 OE# A3 A10 DQ7 A0 A2 CE# DQ5 DQ3 DQ2 DQ0 A1 DQ6 DQ4 VSS DQ1 TOP VIEW (balls facing down) Note: For SST39LF020, ball B3 is "No Connect" For SST39LF010, balls B3 and A5 are "No Connect" A B C D E F G H J 6 5 4 3 2 1 |
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