9

FN6306.3

December 6, 2006

cycle. The retry period is thus two dummy soft-start cycles

plus one variable one (which depends on how long it takes to

trip the sensor each time). Figure 5 shows an example

where the output gets about half-way up before shutting

down; therefore, the retry (or hiccup) time will be around

17ms. The minimum should be nominally 13.6ms and the

maximum 20.4ms. If the short condition is finally removed,

the output should ramp up normally on the next T2 cycle.

Starting up into a shorted load looks the same as a retry into

that same shorted load. In both cases, OCP is always

enabled during soft-start; once it trips, it will go into retry

(hiccup) mode. The retry cycle will always have two dummy

time-outs, plus whatever fraction of the real soft-start time

passes before the detection and shutoff; at that point, the

logic immediately starts a new two dummy cycle time-out.

Output Voltage Selection

The output voltage can be programmed to any level between

ISL8105 can run at near 100% duty cycle at zero load, but

something less as the load current increases. In addition, the

OCP (if enabled) will also limit the maximum effective duty

cycle.

An external resistor divider is used to scale the output

voltage relative to the internal reference voltage, and feed it

back to the inverting input of the error amp. See “Typical

(±1% for

(see “Feedback Compensation” on page 11), it is often

that way the compensation calculations do not need to be

Output voltages less than 0.6V are not available.

Input Voltage Considerations

The “Typical Application” on page 2 shows a standard

to work anywhere from 6.5V up to the 14.4V maximum. The

long-term reliability reasons, but transitions through it to

voltages above 6.5V are acceptable.

There is an internal 5V regulator for bias; it turns on between

5.5 and 6.5V. Some of the delay after POR is there to allow a

typical power supply to ramp up past 6.5V before the

softstart ramps begins. This prevents a disturbance on the

output, due to the internal regulator turning on or off. If the

transition is slow (not a step change), the disturbance should

be minimal. So while the recommendation is to not have the

output enabled during the transition through this region, it

may be acceptable. The user should monitor the output for

their application to see if there is any problem.

initialization is done, then the soft-start will not be able to

ramp the output, and the output will later follow part of the

change the sequencing of the supplies, or use the

turns on, the resistor divider R1 and R2 determines when Q1

turns on, which will turn off Q2 and release the shut-down. If

NFET's or NPN's or even some logic IC's can be used as Q1

or Q2; but Q2 must be low leakage when off (open-drain or

open-collector) so as not to interfere with the COMP output.

Q2 should also be placed near the COMP/EN pin.

voltage.

voltage - the diode drop), + any ringing (or other transients)

ringing) must be <24V. So based on typical circuits, a 20V

verify the ringing in their particular application.

Ω

0.6V

+

()

--------------------------

•

=

(EQ. 2)

•

–

----------------------------------

=

(EQ. 3)

FIGURE 6. SEQUENCER CIRCUIT

TO COMP/EN

ISL8105, ISL8105A