8

FN7103.9

September 14, 2010

Description of Operation and Application

Information

Product Description

The EL8100, EL8101 are wide bandwidth, single supply, low

power and rail-to-rail output voltage feedback operational

amplifiers. Both amplifiers are internally compensated for

closed loop gain of +1 of greater. Connected in voltage

follower mode and driving a 1k

Ω load, the EL8100, EL8101

have a -3dB bandwidth of 200MHz. Driving a 150

Ω load, the

bandwidth is about 130MHz while maintaining a 200V/µs

slew rate. The EL8100 is available with a power-down pin to

reduce power to 30µA typically while the amplifier is

disabled.

Input, Output and Supply Voltage Range

The EL8100, EL8101 have been designed to operate with a

single supply voltage from 3V to 5.0V. Split supplies can also

be used as long as their total voltage is within 3V to 5.0V.

The amplifiers have an input common mode voltage range

from 0.15V below the negative supply (VS- pin) to within

1.5V of the positive supply (VS+ pin). If the input signal is

outside the above specified range, it will cause the output

signal to be distorted.

The output of the EL8100, EL8101 can swing rail-to-rail. As

the load resistance becomes lower, the ability to drive close

to each rail is reduced. For the load resistor 1k

Ω, the output

swing is about 4.9V at a 5V supply. For the load resistor

150

Ω, the output swing is about 4.6V.

Choice of Feedback Resistor and Gain Bandwidth

Product

For applications that require a gain of +1, no feedback

resistor is required. Just short the output pin to the inverting

input pin. For gains greater than +1, the feedback resistor

forms a pole with the parasitic capacitance at the inverting

input. As this pole becomes smaller, the amplifier’s phase

margin is reduced. This causes ringing in the time domain

FIGURE 23. DISABLED RESPONSE

FIGURE 24. ENABLED RESPONSE

FIGURE 25. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

CH1, CH2, 0.5V/DIV, M = 20ns

CH2

CH1

ENABLE

INPUT

OUTPUT

CH1, CH2, 1V/DIV, M = 100ns

CH2

CH1

ENABLE

INPUT

909mW

1.4

1.2

1.0

0.8

0.6

0.2

0

0

25

50

75

100

150

125

85

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.4

AMBIENT TEMPERATURE (°C)

435mW

SO8

SOT23-5/6

1.0

0.9

0.8

0.6

0.4

0.1

0

0

25

50

75

100

150

AMBIENT TEMPERATURE (°C)

125

85

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.2

0.7

0.3

0.5

625mW

SO8

SOT23-5/6

391mW

EL8100, EL8101