10

FN6745.1

July 8, 2010

Static Regulation

by the VID inputs per Table 1. A true differential amplifier

connected to the VSEN and RTN pins implements processor

Kelvin sense for precise core voltage regulation at the GPU

voltage sense points.

The ISL6263C can accommodate DCR current sense or

discrete resistor current sense. The DCR current sense uses

the intrinsic series resistance of the output inductor, as

shown in the application circuit of Figure 2. The discrete

resistor current sense uses a shunt resistor in series with the

output inductor, as shown in the application circuit in

Figure 3. In both cases, the signal is fed to the non-inverting

input of the current sense amplifier at the ISP pin, where it is

measured differentially with respect to the output voltage of

the converter at the VO pin and amplified. The voltage at the

ICOMP pin minus the output voltage measured at the VO

pin, is proportional to the total inductor current. This

information is used for overcurrent protection and current

monitoring. It is important to note that this current

measurement should not be confused with the synthetic

When using inductor DCR current sense, an NTC

compensation network is optional to compensate the

positive temperature coefficient of the copper winding, thus

maintaining the current sense accuracy.

Processor Kelvin Voltage Sense

The remote voltage sense input pins VSEN and RTN of the

ISL6263C are to be terminated at the die of the GPU. Kelvin

sense allows the voltage regulator to tightly control the

processor voltage at the die, compensating for various

resistive voltage drops in the power delivery path.

Since the voltage feedback is sensed at the processor die,

removing the GPU will open the voltage feedback path of the

regulator, causing the output voltage to rise towards VIN.

The ISL6263C will shut down when the voltage between the

VO and VSS pins exceeds the severe overvoltage protection

voltage feedback from the regulator local output in the

absence of the GPU. These resistors should be in the range

of 20Ω to 100Ω

.

VR_ON

PGOOD

13 SWITCHING CYCLES

~100µs

90%

FIGURE 4. ISL6263C START-UP TIMING

FIGURE 5. SIMPLIFIED GPU KELVIN SENSE AND INDUCTOR DCR CURRENT SENSE

ISP

ISN

+

−

+

−

+

−

VO

VSEN

RTN

+

−

VDIFF

OCP

OCSET

ICOMP

Isense

ESR

DCR

PHASE

TO

PROCESSOR

KELVIN

CONNECTIONS

↓

VDD

10µA

ISL6263C