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ISL6263ACRZ-T Datasheet(PDF) 9 Page - Intersil Corporation |
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ISL6263ACRZ-T Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 19 page 9 FN9284.3 July 8, 2010 Functional Pin Descriptions RBIAS (Pin 1) - Sets the internal 10µA current reference. Connect a 150k Ω ±1% resistor from RBIAS to VSS. SOFT (Pin 2) - Sets the output voltage slew-rate. Connect an X5R or X7R ceramic capacitor from SOFT to VSS. The SOFT pin is the non-inverting input of the error amplifier. OCSET (Pin 3) - Sets the overcurrent threshold. Connect a resistor from OCSET to VO. VW (Pin 4) - Sets the static PWM switching frequency in continuous conduction mode. Connect a resistor from VW to COMP. COMP (Pin 5) - Connects to the output of the control loop error amplifier. FB (Pin 6) - Connects to the inverting input of the control loop error amplifier. VDIFF (Pin 7) - Connects to the output of the VDIFF differential-summing amplifier. VSEN (Pin 8) - This is the VCC_SNS input of the processor socket Kelvin connection. Connects internally to one of two non-inverting inputs of the VDIFF differential-summing amplifier. RTN (Pin 9) - This is the VSS_SNS input of the processor socket Kelvin connection. Connects internally to one of two inverting inputs of the VDIFF differential-summing amplifier. DROOP (Pin 10) - Connects to the output of the droop differential amplifier and to one of two non-inverting inputs of the VDIFF differential-summing amplifier. DFB (Pin 11) - This is the feedback of the droop amplifier. Connects internally to the inverting input of the droop differential amplifier. VO (Pin 12) - Connects to one of two inverting inputs of the VDIFF differential-summing amplifier. VSUM (Pin 13) - Connects to the non-inverting input of the droop differential amplifier. VIN (Pin 14) - Connects to the R3 PWM modulator providing input voltage feed-forward. For optimum input voltage transient response, connect near the drain of the high-side MOSFETs. VSS (Pin 15) - Analog ground. VDD (Pin 16) - Input power supply for the IC. Connect to +5VDC and decouple with at least a 1µF MLCC capacitor from the VDD pin to the VSS pin. BOOT (Pin 17) - Input power supply for the high-side MOSFET gate driver. Connect an MLCC bootstrap capacitor from the BOOT pin to the PHASE pin. UGATE (Pin 18) - High-side MOSFET gate driver output. Connect to the gate of the high-side MOSFET. PHASE (Pin 19) - Current return path for the UGATE high-side MOSFET gate driver. Detects the polarity of the PHASE node voltage for diode emulation. Connect the PHASE pin to the drains of the low-side MOSFETs. PGND (Pin 20) - Current return path for the LGATE low-side MOSFET gate driver. The PGND pin only conducts current when LGATE pulls down. Connect the PGND pin to the sources of the low-side MOSFETs. LGATE (Pin 21) - Low-side MOSFET gate driver output. Connect to the gate of the low-side MOSFET. PVCC (Pin 22) - Input power supply for the low-side MOSFET gate driver, and the high-side MOSFET gate driver, via the internal bootstrap diode connected between the PVCC and BOOT pins. Connect to +5VDC and decouple with at least 1µF of an MLCC capacitor from the PVCC pin to the PGND pin. VID0:VID4 (Pin 23:Pin 27) - Voltage identification inputs. VID0 input is the least significant bit (LSB) and VID4 input is the most significant bit (MSB). PMON (Pin 28) - A voltage signal proportional to the output power of the converter. VR_ON (Pin 29) - A high logic signal on this pin enables the converter and a low logic signal disables the converter. AF_EN (Pin 30) - Used in conjunction with VID0:VID4 and FDE pins to program the diode-emulation and audio filter behavior. Refer to Table 1. PGOOD (Pin 31) - The PGOOD pin is an open-drain output that indicates when the converter is able to supply regulated voltage. Connect the PGOOD pin to a maximum of 5V through a pull-up resistor. FDE (Pin 32) - Used in conjunction with VID0:VID4 and AF_EN pins to program the diode-emulation and audio filter behavior. Refer to Table 1. BOTTOM - Connects to substrate. Electrically isolated but should be connected to VSS. Requires best practical thermal coupling to PCB. TABLE 1. DIODE-EMULATION MODE AND AUDIO-FILTER RENDER MODE FDE AF_EN DEM STATUS VOLTAGE WINDOW AUDIO FILTER PERFORMANCE 0 x DISABLED NOM x 1 x ENABLED 130% NOM x SUSPEND x 0 ENABLED 150% NOM x 1 1 ENABLED 130% NOM x 0 1 ENABLED 130% NOM ENABLED ISL6263A |
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