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ISL88706IP831Z Datasheet(PDF) 8 Page - Intersil Corporation |
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ISL88706IP831Z Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 15 page 8 FN8092.5 January 12, 2009 . Manual Reset The manual-reset input (MR) allows the user to trigger a reset by using a push-button switch. The MR input is an active low debounced input. By connecting a push-button directly from MR to ground, the designer adds manual system reset capability (see Figure 4). Reset is asserted if the MR pin is pulled low to less than 100mV for the minimum MR pulse width or longer while the push-button is closed. After MR is released, the reset outputs remain asserted for tPOR (200ms) and then released. Watchdog Timer The Watchdog Timer circuit checks microprocessor activity by monitoring the WDI input pin. The microprocessor must periodically toggle the WDI pin within tWDT (typically ~1.6s), otherwise the WDO pin pulls low (see Figure 5). The WDO then signals reset periodically (typically ~1.9s) for ~220ms until the WDI is again toggled. Internally, the 1.6s timer is cleared by either a reset or by toggling the WDI input, which can detect pulses longer than 50ns. Whenever there is a low-voltage VDD condition, WDO goes low. Unlike the reset outputs, however, WDO does not have a minimum reset pulse width (tPOR). WDO goes high as soon as VDD rises above its voltage trip point (see Figure 5). With WDI open or connected to a tristated high impedance input, the Watchdog Timer is disabled and only pulls low when VDD < VTH1. ISL88707, ISL88708 FIGURE 3. ADJUSTING tPOR WITH A CAPACITOR CPOR (pF) CPOR 0 2 4 6 8 10 12 14 010 20 30 40 50 60 70 80 90 100 NORMALIZED tPOR vs CPOR (pF) OPEN = 200ms MR PB 20k FIGURE 4. CONNECTING A MANUAL RESET PUSH-BUTTON ISL8870x ISL88705, ISL88706, ISL88707, ISL88708, ISL88716, ISL88813 |
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