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EL5175ISZ Datasheet(PDF) 10 Page - Intersil Corporation |
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EL5175ISZ Datasheet(HTML) 10 Page - Intersil Corporation |
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10 / 15 page  10 FN7306.5 Simplified Schematic FIGURE 19. ENABLED RESPONSE FIGURE 20. DISABLED RESPONSE FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 22. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Typical Performance Curves (Continued) 100ns/DIV CH1 CH2 M=100ns CH1=200mV/DIV CH2=5V/DIV 400ns/DIV CH1 CH2 M=400ns CH1=200mV/DIV CH2=5V/DIV JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 870mW 625mW 486mW QSOP24 θJA=115°C/W SO8 θJA=160°C/W MSOP8 θJA=206°C/W 0 AMBIENT TEMPERATURE (°C) 25 125 150 85 100 50 75 1.2 1 0.2 0 0.6 0.4 0.8 JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0 AMBIENT TEMPERATURE (°C) 1.4 25 125 150 85 100 50 75 1.2 0.2 0 0.6 0.4 1 0.8 1.136W 909mW 870mW MSOP8 θJA=115°C/W SO8 θJA=110°C/W QSOP24 θJA=88°C/W R2 R1 R4 R3 RD2 RD1 Q8 FB Q4 VREF Q3 VIN- Q2 VIN+ Q1 Q6 VS+ I4 I3 I2 I1 Q7 VB1 VS- 25 Q9 VB2 x1 VOUT CC EL5175, EL5375 |
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