8

FN9192.2

December 4, 2008

Pin Description

PIN #

NAME

I/O

TYPE

DESCRIPTION

1

VID7

I

1.2V CMOS

Bit 7 of processor voltage identification word (MSB of 8-bit VID word).

2

VID6

I

1.2V CMOS

Bit 6 of processor voltage identification word.

3

VID5

I

1.2V CMOS

Bit 5 of processor voltage identification word.

4

VID4

I

1.2V CMOS

Bit 4 of processor voltage identification word.

5

VID3

I

1.2V CMOS

Bit 3 of processor voltage identification word.

6

VID2

I

1.2V CMOS

Bit 2 of processor voltage identification word.

7

VID1

I

1.2V CMOS

Bit 1 of processor voltage identification word.

8

VID0

I

1.2V CMOS

Bit 0 of processor voltage identification word (LSB of 8-bit VID word).

9

VID_SEL

I

1.2V CMOS

VID table selection input.

“1”

VR11 VID table selected

“0”

VR10 VID table selected

10

LL1

I

1.2V CMOS

Processor load line select input control signal (MSB). Selects regulator load line

resistance.

11

OUTEN

I

1.2V CMOS

Processor output enable input signal used to command the regulator output.

“1”

Regulator output voltage enabled

“0”

Regulator output voltage disabled

12

VDD

I

VDD

3.3V power supply connection; decoupling cap should be placed close to pin.

13

FAULT1

O

3.3V CMOS

Programmable fault indicator #1.

14

FAULT2

O

3.3V CMOS

Programmable fault indicator #2.

15

VR_READY

O

Open Drain

Digital Controller output signal to indicate the regulator output voltage is within the

specified range.

“1”

µP VCC within 10% of target regulation voltage

“0”

µP VCC outside 10% of target regulation voltage

16

GND

Pin used in test mode only, tie to Ground for normal operation.

17

V12_SEN

I

Analog

12V voltage divider input. Used to guarantee valid input power supply before starting

up (undervoltage lockout).

18

VSENN

I

Analog

Negative voltage sense input.

19

VSENP

I

Analog

Positive voltage sense input.

20

TEMP_SEN

I

Analog

External thermistor temperature sense. Connected to ground through a negative TC

thermistor, with series and shunt resistance added to achieve desired range. See

“External Temperature Sense” on page 13 for more information.

21

ISEN5-

I

Phase channel #5 ADC current sense (-) input, tie to ground if the phase is unused.

22

ISEN5+

I

Analog

Phase channel #5 ADC current sense (+) input.

23

PWM5

O

3.3V CMOS

Phase channel #5 PWM output.

24

VDD

I

VDD

3.3V power supply connection; decoupling cap should be placed close to pin.

25

ISEN6-

I

Phase channel #6 ADC current sense (-) input, tie to ground if the phase is unused.

26

ISEN6+

I

Analog

Phase channel #6 ADC current sense (+) input.

27

PWM6/ATRLBB

O

3.3V CMOS

Phase channel #6 PWM output or optional external ATRL output.

28

ISEN4-

I

Phase channel #4 ADC current sense (-) input, tie to ground if the phase is unused.

29

ISEN4+

I

Analog

Phase channel #4 ADC current sense (+) input.

30

PWM4

O

3.3V CMOS

Phase channel #4 PWM output.

31

ISEN3-

I

Phase channel #3 ADC current sense (-) input, tie to ground if the phase is unused.

32

ISEN3+

I

Analog

Phase channel #3 ADC current sense (+) input.

33

PWM3

O

3.3V CMOS

Phase channel #3 PWM output.

ISL6595