5

Soft-Start

Figures 3 and 4 show the soft-start sequence for the typical

surpasses POR level. Time T2, one soft start interval after

brought up through the internal standby LDO through an

rail initiating a soft start at time T2 as well. The ISL6506A will

draw 7.5

µA into the 5VDLSB for a duration of one soft start

to Typical Application Schematic) in a controlled manner. At

experience a sudden step as the P-MOSFET gate is fully

enhanced. The soft start profile of the 5VDUAL may be

altered by placing a capacitor between the gate and drain of

the P-MOSFET. Adding this capacitor will increase the gate

At time T4, the system has transitioned into S0 state and the

ATX supplies have begun to ramp up. With the ISL6506/B

surpassed the 12V POR level. Time T6 is three soft start

cycles after the 12V POR level has been surpassed. At time

T6, three events occur simultaneously. The DLA pin is forced

to a high impedance state which allows the 12V rail to

pin is forced to a high impedance state which will turn the

Sleep to Wake State Transitions

Figures 3 and 4, starting at time T4, depict the transitions

from sleep states to the S0 wake state. Figure 3 shows the

transition of the ISL6506/B from the S4/S5 state to the S0

state. Figure 4 shows how the ISL6506/B will transition from

the S3 sleep state into S0 state. Figure 3 also shows how

the ISL6506A transitions from either S3 or S4/S5 in the S0

state. For all transitions, T4 depicts the system transition into

the S0 state. Here, the ATX supplies are enabled and begin

POR threshold for the ISL6506/B and ISL6506A. Three soft

start periods after time T5, at time T6, three events occur

ISL6506A

5VSB

3.3V, 5V, 12V

S3

S5

5VDLSB

DLA

3V3DL

5VDL

0V

TIME

5VSB

(1V/DIV)

FIGURE 3. ISL6506 and ISL6506B SOFT-START INTERVAL

IN S4/S5 STATE AND S5 TO S0 TRANSITION

12VATX (2V/DIV)

5VATX (1V/DIV)

5VDUAL

(1V/DIV)

3.3VDUAL

(2V/DIV)

T1

T2

T3

T0

T5

T4

T6

DLA

(10V/DIV)

3.3VATX (1V/DIV)

FIGURE 4. SOFT START INTERVAL FOR ISL6506A IN S4/S5

AND S5 TO S0 TRANSITION FOR ISL6506A AND

S3 TO S0 TRANSITION FOR ISL6506/A/B

0V

TIME

T1

T2

T3

T0

T5

T4

T6

5VDLSB

(5V/DIV)

5VSB

(1V/DIV)

5VDUAL

(1V/DIV)

3.3VDUAL

(2V/DIV)

DLA

(10V/DIV)

12VATX (2V/DIV)

5VATX (1V/DIV)

3.3VATX (1V/DIV)

ISL6506, ISL6506A, ISL6506B