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LM2759SD Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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LM2759SD Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 14 page Application Information CIRCUIT DESCRIPTION The LM2759 is an adaptive CMOS charge pump with gains of 1x, 1.5x, and 2x, optimized for driving Flash LEDs in cam- era phones and other portable applications. It provides a constant current of up to 1A (typ.) for Flash mode and 180 mA (typ.) for Torch mode. The LM2759 has selectable modes including Flash, Torch, Indicator and Shutdown. Flash mode for the LM2759 can also be enabled via the Strobe input pin. The LED is driven from V OUT and connected to the current sink. The LED drive current and operating modes are programmed via an I2C compatible interface. The LM2759 adaptively selects the next highest gain mode when needed to maintain the programmed LED current level. To prevent a high battery load condition during a simultane- ous RF PA transmission and Flash event, LM2759 has a Flash interrupt pin (TX) to reduce the LED current to the pro- grammed Torch current level for the duration of the RF PA transmission pulse. CHARGE PUMP AND GAIN TRANSITIONS The input to the 1x, 1.5x, 2x charge pump is connected to the V IN pin, and the loosely regulated output of the charge pump is connected to the V OUT pin. In 1x mode, as long as the input voltage is less than 4.7V (typ.), the output voltage is approx- imately equal to the input voltage. When the input voltage is over 4.7V (typ.) the output voltage is regulated to 4.7V (typ.). In 1.5x mode, the output voltage is regulated to 4.7V (typ.) over entire input voltage range. For the gain of 2x, the output voltage is regulated to 5.1V (typ.). When under load, the volt- age at V OUT can be less than the target regulation voltage while the charge pump is still in closed loop operation. This is due to the load regulation topology of the LM2759. The charge pump’s gain is selected according to the head- room voltage across the current sink of LM2759. When the headroom voltage V GDX (at the LED cathode) drops below 350 mV (typ.) the charge pump gain transitions to the next available higher gain mode. Once the charge pump transi- tions to a higher gain, it will remain at that gain for as long as the device remains enabled. Shutting down and then re-en- abling the device resets the gain mode to the minimum gain required to maintain the load. SOFT START The LM2759 contains internal soft-start circuitry to limit inrush currents when the part is enabled. Soft start is implemented internally with a controlled turn-on of the internal voltage ref- erence. CURRENT LIMIT PROTECTION The LM2759 charge pump contains current limit protection circuitry that protects the device during V OUT fault conditions where excessive current is drawn. Output current is limited to 1.4A typically. LOGIC CONTROL PINS LM2759 has two asynchronous logic pins, Strobe and TX. These logic inputs function according to the table below: TX STROBE FUNCTION 0 0 Current I2C programmed state (Off, Torch, Flash, Indicator) 1 0 Current I2C programmed state (Off, Torch, Flash, Indicator). If Flash is enabled via I2C and TX is logic High, the LED current will be at the programmed Torch level. 0 1 Flash Mode (Total LED "ON" Duration limited by Flash Timeout) 1 1 Torch Mode (Total LED "ON" Duration limited by Flash Timeout) I2C COMPATIBLE INTERFACE START AND STOP CONDITIONS START and STOP conditions classify the beginning and the end of the I2C session. A START condition is defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP conditions. The I2C bus is con- sidered to be busy after a START condition and free after a STOP condition. During data transmission, the I2C master can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise. 30069311 FIGURE 1. Start and Stop Conditions DATA VALIDITY The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of the data line can only be changed when SCL is LOW. 30069325 FIGURE 2. Data Validity Diagram A pull-up resistor between the controller's VIO line and SDA must be greater than [ (VIO-V OL) / 3.5mA] to meet the VOL requirement on SDA. Using a larger pull-up resistor results in lower switching current with slower edges, while using a smaller pull-up results in higher switching currents with faster edges. TRANSFERING DATA Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each byte of 9 www.national.com |
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