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LM2758 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LM2758 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 14 page Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential to the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T J=150°C (typ.) and disengages at TJ = 140°C (typ.). Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 k Ω resistor into each pin. The machine model is a 200pF capacitor discharged directly into each pin. MIL-STD-883 3015.7 Note 5: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN-1112. Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T A-MAX) is dependent on the maximum operation junction temperature (TJ-MAX-OP = 125ºC), the maximum power dissipation of the device in the application (P D-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: T A-MAX = TJ-MAX-OP - (θJA × PD-MAX). Note 7: Junction-to-ambient thermal resistance ( θ JA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4–layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array of thermal vias. The ground plane on the board is 50 mm x 50 mm. Thickness of copper layers are 53µm/35µm/35µm/53µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22°C, still air. Power dissipation is 1W. The value of θ JA of this product in this micro SMD could fall in a range as wide as 50ºC/W to 150ºC/W (if not wider), depending on PWB material, layout, and environmental conditions. In applications where high maximum power dissipation exists (high V IN, high IOUT), special care must be paid to thermal dissipation issues. Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (Typ) numbers are not guaranteed, but do represent the most likely norm. Unless otherwise specified, conditions for Typ specifications are: V IN = 3.6V and TA = 25°C. Note 9: C IN, COUT, C1, C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. Note 10: Output voltage is internally limited not to exceed maximum specified value. Note 11: These specification table entries are guaranteed by design. These parameters are not guaranteed by production testing. The temperature limits for test are (-40°C ≤ T A ≤ +85°C). Note 12: The temperature limits for I SD (shutdown current) test are -40°C ≤ TA ≤ +85°C, as in Shutdown mode ambient temperature is equal to junction temperature. Note 13: The time-out specifications are calculated values based on the switching frequency spread. www.national.com 4 |
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