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BF1202WR Datasheet(PDF) 6 Page - NXP Semiconductors |
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BF1202WR Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 15 page 2010 Sep 16 6 NXP Semiconductors Product specification N-channel dual-gate PoLo MOS-FETs BF1202; BF1202R; BF1202WR handbook, halfpage 050 20 0 4 8 12 16 10 20 30 40 IG1 (μA) ID (mA) MCD956 Fig.9 Drain current as a function of gate 1 current; typical values. VDS =5 V; VG2-S =4V. Tj =25 C. handbook, halfpage 0 VGG (V) 15 16 12 4 0 8 23 4 MCD957 ID (mA) Fig.10 Drain current as a function of gate 1 supply voltage (= VGG); typical values. VDS =5 V; VG2-S =4V; Tj =25 C. RG1 =120 k (connected to VGG); see Fig.21. handbook, halfpage 024 6 VGG = VDS (V) ID (mA) 20 0 16 12 8 4 MCD958 RG1 = 68 kΩ 82 k Ω 100 k Ω 120 k Ω 150 k Ω 220 k Ω 180 k Ω Fig.11 Drain current as a function of gate 1 (= VGG) and drain supply voltage; typical values. VG2-S =4 V; Tj =25 C. RG1 connected to VGG; see Fig.21. handbook, halfpage 02 46 16 12 4 0 8 MCD959 VG2-S (V) ID (mA) 4.5 V 4 V 3 V VGG = 5 V 3.5 V VDS =5 V; Tj =25 C. RG1 =120 k (connected to VGG); see Fig.21. Fig.12 Drain current as a function of gate 2 voltage; typical values. |
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