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MC54-74HC251 Datasheet(PDF) 1 Page - Motorola, Inc |
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MC54-74HC251 Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 7 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1 REV 6 © Motorola, Inc. 1995 10/95 8-Input Data Selector/ Multiplexer with 3-State Outputs High–Performance Silicon–Gate CMOS The MC54/74HC251 is identical in pinout to the LS251. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device selects one of the eight binary Data Inputs, as determined by the Address Inputs. The Output Enable pin must be a low level for the selected data to appear at the outputs. If Output Enable is high, both the Y and the Y outputs are in the high–impedance state. This 3–state feature allows the HC251 to be used in bus–oriented systems. The HC251 is similar in function to the HC151 which does not have 3–state outputs. • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2 to 6 V • Low Input Current: 1 µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 134 FETs or 33.5 Equivalent Gates LOGIC DIAGRAM D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 OUTPUT ENABLE Y Y DATA OUTPUTS DATA INPUTS ADDRESS INPUTS 5 6 4 3 2 1 15 14 13 12 11 10 9 7 PIN 16 = VCC PIN 8 = GND MC54/74HC251 PIN ASSIGNMENT FUNCTION TABLE Inputs Outputs Output A2 A1 A0 Enable Y Y X X X H Z Z L L L L D0 D0 L L H L D1 D1 L H L L D2 D2 L H H L D3 D3 H L L L D4 D4 H L H L D5 D5 H H L L D6 D6 H H H L D7 D7 Z = high impedance D0, D1, …, D7 = the level of the respective D input. 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 D7 D6 D5 D4 VCC A2 A1 A0 D0 D1 D2 D3 GND OUTPUT ENABLE Y Y D SUFFIX SOIC PACKAGE CASE 751B–05 N SUFFIX PLASTIC PACKAGE CASE 648–08 ORDERING INFORMATION MC54HCXXXJ MC74HCXXXN MC74HCXXXD Ceramic Plastic SOIC 1 16 1 16 J SUFFIX CERAMIC PACKAGE CASE 620–10 1 16 |
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