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MB90V495G Datasheet(PDF) 4 Page - Fujitsu Component Limited. |
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MB90V495G Datasheet(HTML) 4 Page - Fujitsu Component Limited. |
4 / 52 page MB90895 Series 4 DS07-13731-5E (Continued) *1 : Settings of DIP switch S2 for using emulation pod MB2145-507. For details, see MB2145-507 Hardware Manual (2.7 Power Pin solely for Emulator). *2 : MB90F897S/YS ■ PACKAGES AND PRODUCT MODELS : Yes, × : No Note : Refer to “ PACKAGE DIMENSION” for details of the package. Part number Parameter MB90F897 MB90F897S MB90F897Y (Under development) MB90F897YS (Under development) MB90V495G DTP/External interrupt Number of inputs: 4 Activated by rising edge, falling edge, “H” level or “L” level input. External interrupt or extended intelligent I/O service (EI2OS) is available. 8/10-bit A/D converter Number of channels: 8 Resolution: Selectable 10-bit or 8-bit. Conversion time: 6.125 μs (at 16-MHz machine clock, including sampling time) Sequential conversion of two or more successive channels is allowed. (Setting a maximum of 8 channels is allowed.) Single conversion mode : Selected channel is converted only once. Sequential conversion mode: Selected channel is converted repetitively. Halt conversion mode : Conversion of selected channel is stopped and activated alternately. UART0 (SCI) Number of channels: 1 Clock-synchronous transfer: 62.5 kbps to 2 Mbps Clock-asynchronous transfer: 1,202 bps to 62,500 bps Communication is allowed by bi-directional serial communication function and master/slave type connection. UART1 (SCI) Number of channels: 1 Clock-synchronous transfer: 62.5 kbps to 2 Mbps Clock-asynchronous transfer: 9,615 bps to 500 kbps Communication is allowed by bi-directional serial communication function and master/slave type connection. CAN Complied with Ver 2.0A and Ver 2.0B CAN specifications. 8 built-in message buffers. Transmission rate of 10 kbps to 1 Mbps (by 16 MHz machine clock) CAN wake-up Package MB90F897/S/Y/YS FPT-48P-M26 |
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