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PUML1DG Datasheet(PDF) 2 Page - NXP Semiconductors |
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PUML1DG Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 12 page PUML1_DG_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 14 July 2008 2 of 12 NXP Semiconductors PUML1/DG 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 2. Pinning information 3. Ordering information 4. Marking [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values Table 2. Pinning Pin Description Simplified outline Graphic symbol 1 emitter TR1 2 base TR1 3 output (collector) TR2 4 GND (emitter) TR2 5 input (base) TR2 6 collector TR1 13 2 4 5 6 65 4 12 3 R2 TR1 TR2 R1 006aab253 Table 3. Ordering information Type number Package Name Description Version PUML1/DG SC-88 plastic surface-mounted package; 6 leads SOT363 Table 4. Marking codes Type number Marking code[1] PUML1/DG PA* Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit TR1 (general-purpose transistor) VCBO collector-base voltage open emitter - 60 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 6 V IC collector current - 200 mA ICM peak collector current single pulse; tp ≤ 1ms - 200 mA IBM peak base current single pulse; tp ≤ 1ms - 100 mA |
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Similar Description - PUML1DG |
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