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PX1012A-ELG Datasheet(PDF) 11 Page - NXP Semiconductors |
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PX1012A-ELG Datasheet(HTML) 11 Page - NXP Semiconductors |
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11 / 32 page  PX1011A_PX1012A_2 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 02 — 18 May 2006 11 of 32 Philips Semiconductors PX1011A/PX1012A PCI Express stand-alone X1 PHY [1] TXIDLE = 0 [2] TXIDLE = 1 8.6 Receiver detect When the PHY is in the P1 state, it can be instructed to perform a receiver detection operation to determine if there is a receiver at the other end of the link. Basic operation of receiver detection is that the MAC requests the PHY to do a receiver detect sequence by asserting RXDET_LOOPB. When the PHY has completed the receiver detect sequence, it drives the RXSTATUS signals to the value of 011b if a receiver is present, and to 000b if there is no receiver. Then the PHY will assert PHYSTATUS to indicate the completion of receiver detect operation. The MAC uses the rising edge of PHYSTATUS to sample the RXSTATUS signals and then de-asserts RXDET_LOOPB. A few cycles after the RXDET_LOOPB de-asserts, the PHYSTATUS is also de-asserted. 8.7 Loopback The PHY supports an internal loopback from the PCI Express receiver to the transmitter with the following characteristics. The PHY retransmits each 10-bit data and control symbol exactly as received, without applying scrambling or descrambling or disparity corrections, with the following rules: • If a received 10-bit symbol is determined to be an invalid 10-bit code (i.e., no legal translation to a control or data value possible), the PHY still retransmits the symbol exactly as it was received. • If a SKP ordered set retransmission requires adding a SKP symbol to accommodate timing tolerance correction, any disparity can be chosen for the SKP symbol. Table 13. Summary of power management state PWRDWN[1:0] Power management state Transmitter Receiver TX PLL RXCLK RX PLL/CDR 00b P0, normal operation on[1] on on on on 01b P0s, power saving state idle[2] idle on on on 10b P1, lower power state idle[2] idle on on off 11b illegal, PHY will enter P1 - - - - - Fig 5. Receiver detect - receiver present 002aac173 RXCLK 000b 10b 011b 000b PHYSTATUS RXSTATUS2, RXSTATUS1, RXSTATUS0 TXCLK RXDET_LOOPB PWRDWN1, PWRDWN0 |
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