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TFA9800J Datasheet(PDF) 9 Page - NXP Semiconductors

Part # TFA9800J
Description  2 쨈 7 W stereo power amplifier
Download  17 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

TFA9800J Datasheet(HTML) 9 Page - NXP Semiconductors

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TFA9800J_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 17 March 2006
9 of 17
Philips Semiconductors
TFA9800J
2
× 7 W stereo power amplifier
slow. Unfortunately, the slope of the SVRR voltage is not well controlled in the phase
where the SVRR voltage is between ground and ground + 0.7 V. In other words SVRR
makes a step and so does the output. Consequently a plop sound can occur.
Solution is to give the SVRR pin a bias, see anti plop 1 in Figure 4. A second improvement
is to give the DC-outputs of the load a bias, see anti plop 2 Figure 4.
The turn-on and turn-off time can be influenced by an RC-circuit on the pin M/SS; see anti
plop 3 in Figure 4. Rapid on/off switching of the device or pin M/SS may cause click and
plop noise. A proper timing on pin M/SS can prevent this; see Figure 4.
12.9 Thermal behavior
The typical thermal resistance of the TFA9800J in the DBS9P package (Rth(j-c)) is 4 K/W.
The thermal resistance (Rth(h-a)) of an aluminium heat-sink with a (one-side) area of about
22 cm2 is about 16 K/W. For a maximum ambient temperature of 60
°C the following
calculation can be made for the application at VP =15V, RL =4 Ω and the ALL music
power dissipation is about 4 W:
Remark: The calculation holds for applications at average listening level music output
signals. Applying or testing with sine wave signals will produce about 1.5
× the music
power dissipation. At worst-case condition this can activate the maximum temperature
protection.
12.10 Application diagram and board layout
The single-ended application circuit diagram is shown in Figure 3. The PCB layout for this
application is shown in Figure 5 and Figure 6.
T
j max
()
T
amb
P
tot
R
th j
c
()
R
th h
a
()
+
()
×
+
=
T
jmax
()
60
4.0
4
16
+
()
×
+
140
°C
==
Fig 3.
Single-ended application block diagram
001aad580
1000
µF
1000
µF
100
µF
2200
µF
100
nF
220 nF
220 nF
TFA9800J
Vref
2
SGND
−INV1
OUT1
SVRR
OUT2
−INV2
PGND
9
1
IN1
IN2
4
VP
87
3
6
5
4
4


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