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PSD4235G2V-12UIT Datasheet(PDF) 1 Page - STMicroelectronics |
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PSD4235G2V-12UIT Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 124 page  February 2009 Rev 2 1/124 1 PSD4235G2V Flash in-system programmable (ISP) peripherals for 16-bit MCUs (3.3 V supply) Features PSD provides an integrated solution to 16-bit MCU based applications that includes configurable memories, PLD logic and I/Os: ■ Dual bank Flash memories – 4 Mbit of Primary Flash memory (8 uniform sectors, 32K x 16) – 256 Kbit Secondary Flash memory with 4 sectors – Concurrent operation: read from one memory while erasing and writing the other ■ 64 Kbit SRAM ■ PLD with macrocells – Over 3000 gates of PLD: CPLD and DPLD – CPLD with 16 output macrocells (OMCs) and 24 input macrocells (IMCs) – DPLD - user defined internal chip select decoding ■ Seven I/O ports with 52 I/O pins – 52 individually configurable I/O port pins that can be used for the following functions: – MCU I/Os – PLD I/Os – Latched MCU address output – Special function l/Os – l/O ports may be configured as open-drain outputs ■ In-system programming (ISP) with JTAG – Built-in JTAG compliant serial port allows full-chip In-System Programmability – Efficient manufacturing allow easy product testing and programming – Use low cost FlashLINK cable with PC ■ Page register – Internal page register that can be used to expand the microcontroller address space by a factor of 256 ■ Programmable power management ■ High endurance – 100,000 Erase/write cycles of Flash memory – 1,000 Erase/WRITE Cycles of PLD – 15 Year Data Retention ■ Single supply voltage –3.3 V ±10% ■ Memory speed – 90 ns Flash memory and SRAM access time ■ Package is ECOPACK® LQFP80 (U) 80-lead, Thin, Quad, Flat www.st.com |
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