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CY7C64315-16LKXIT Datasheet(PDF) 10 Page - Cypress Semiconductor |
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CY7C64315-16LKXIT Datasheet(HTML) 10 Page - Cypress Semiconductor |
10 / 32 page CY7C6431x CY7C6434x, CY7C6435x Document Number: 001-12394 Rev *I Page 10 of 32 32-Pin Part Pinout Figure 7. CY7C64343/CY7C64345 32-Pin enCoRe V USB Device P0[1] P2[5] P2[3] P2[1] P1[7] QFN (Top View) 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 P1[5] P1[1] P0[0] P2[6] P3[0] XRES P2[4] P2[2] P2[0] P3[2] P1[3] Table 2. 32-Pin Part Pinout (QFN) Pin No. Type Name Description 1 IOH P0[1] Digital I/O 2 I/O P2[5] Digital I/O, Crystal Output (Xout) 3 I/O P2[3] Digital I/O, Crystal Input (Xin) 4 I/O P2[1] Digital I/O 5 IOHR P1[7] Digital I/O, I2C SCL, SPI SS 6 IOHR P1[5] Digital I/O, I2C SDA, SPI MISO 7 IOHR P1[3] Digital I/O, SPI CLK 8 IOHR P1[1](1, 2) Digital I/O, ISSP CLK, I2C SCL, SPI MOSI 9 Power Vss Ground 10 I/O D+ USB PHY 11 I/O D– USB PHY 12 Power Vdd Supply voltage 13 IOHR P1[0](1, 2) Digital I/O, ISSP DATA, I2C SDA, SPI CLK 14 IOHR P1[2] Digital I/O 15 IOHR P1[4] Digital I/O, optional external clock input (EXTCLK) 16 IOHR P1[6] Digital I/O 17 Reset XRES Active high external reset with internal pull down 18 I/O P3[0] Digital I/O 19 I/O P3[2] Digital I/O 20 I/O P2[0] Digital I/O 21 I/O P2[2] Digital I/O 22 I/O P2[4] Digital I/O 23 I/O P2[6] Digital I/O 24 IOH P0[0] Digital I/O 25 IOH P0[2] Digital I/O 26 IOH P0[4] Digital I/O 27 IOH P0[6] Digital I/O 28 Power Vdd Supply voltage 29 IOH P0[7] Digital I/O 30 IOH P0[5] Digital I/O 31 IOH P0[3] Digital I/O 32 Power Vss Ground CP Power Vss Ensure the center pad is connected to ground LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output [+] Feedback |
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